| Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of Code Aurora Forum, Inc. nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef _PM8x41_HW_H_ |
| 30 | #define _PM8x41_HW_H_ |
| 31 | |
| Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 32 | |
| Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame^] | 33 | /* SMBB Registers */ |
| 34 | #define SMBB_MISC_BOOT_DONE 0x1642 |
| Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 35 | |
| Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame^] | 36 | /* SMBB bit values */ |
| 37 | #define BOOT_DONE_BIT 7 |
| 38 | |
| 39 | |
| 40 | /* GPIO Registers */ |
| 41 | #define GPIO_PERIPHERAL_BASE 0xC000 |
| 42 | /* Peripheral base address for GPIO_X */ |
| 43 | #define GPIO_N_PERIPHERAL_BASE(x) (GPIO_PERIPHERAL_BASE + ((x) - 1) * 0x100) |
| 44 | |
| 45 | /* Register offsets within GPIO */ |
| 46 | #define GPIO_STATUS 0x08 |
| 47 | #define GPIO_MODE_CTL 0x40 |
| 48 | #define GPIO_DIG_VIN_CTL 0x41 |
| 49 | #define GPIO_DIG_PULL_CTL 0x42 |
| 50 | #define GPIO_DIG_OUT_CTL 0x45 |
| 51 | #define GPIO_EN_CTL 0x46 |
| 52 | |
| 53 | /* GPIO bit values */ |
| 54 | #define PERPH_EN_BIT 7 |
| 55 | #define GPIO_STATUS_VAL_BIT 0 |
| 56 | |
| 57 | |
| 58 | /* PON Peripheral registers */ |
| 59 | #define PON_INT_RT_STS 0x810 |
| 60 | #define PON_INT_SET_TYPE 0x811 |
| 61 | #define PON_INT_POLARITY_HIGH 0x812 |
| 62 | #define PON_INT_POLARITY_LOW 0x813 |
| 63 | #define PON_INT_LATCHED_CLR 0x814 |
| 64 | #define PON_INT_EN_SET 0x815 |
| 65 | #define PON_INT_LATCHED_STS 0x818 |
| 66 | #define PON_INT_PENDING_STS 0x819 |
| 67 | #define PON_RESIN_N_RESET_S1_TIMER 0x844 /* bits 0:3 : S1_TIMER */ |
| 68 | #define PON_RESIN_N_RESET_S2_TIMER 0x845 /* bits 0:2 : S2_TIMER */ |
| 69 | #define PON_RESIN_N_RESET_S2_CTL 0x846 /* bit 7: S2_RESET_EN, bit 0:3 : RESET_TYPE */ |
| 70 | |
| 71 | /* PON Peripheral register bit values */ |
| 72 | #define RESIN_BARK_INT_BIT 4 |
| 73 | #define S2_RESET_EN_BIT 7 |
| 74 | |
| 75 | #define S2_RESET_TYPE_WARM 0x1 |
| 76 | #define PON_RESIN_N_RESET_S2_TIMER_MAX_VALUE 0x7 |
| Deepa Dinamani | 2279965 | 2012-07-21 12:26:22 -0700 | [diff] [blame] | 77 | |
| 78 | #endif |