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Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __MMC_SDHCI_H__
30#define __MMC_SDHCI_H__
31
32#include <sdhci.h>
33
34/* Emmc Card bus commands */
35#define CMD0_GO_IDLE_STATE 0
36#define CMD1_SEND_OP_COND 1
37#define CMD2_ALL_SEND_CID 2
38#define CMD3_SEND_RELATIVE_ADDR 3
39#define CMD4_SET_DSR 4
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -070040#define CMD5_SLEEP_AWAKE 5
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070041#define CMD6_SWITCH_FUNC 6
42#define CMD7_SELECT_DESELECT_CARD 7
43#define CMD8_SEND_EXT_CSD 8
44#define CMD9_SEND_CSD 9
45#define CMD10_SEND_CID 10
46#define CMD12_STOP_TRANSMISSION 12
47#define CMD13_SEND_STATUS 13
48#define CMD15_GO_INACTIVE_STATUS 15
49#define CMD16_SET_BLOCKLEN 16
50#define CMD17_READ_SINGLE_BLOCK 17
51#define CMD18_READ_MULTIPLE_BLOCK 18
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -070052#define CMD21_SEND_TUNING_BLOCK 21
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070053#define CMD23_SET_BLOCK_COUNT 23
54#define CMD24_WRITE_SINGLE_BLOCK 24
55#define CMD25_WRITE_MULTIPLE_BLOCK 25
56#define CMD28_SET_WRITE_PROTECT 28
57#define CMD29_CLEAR_WRITE_PROTECT 29
58#define CMD31_SEND_WRITE_PROT_TYPE 31
59#define CMD32_ERASE_WR_BLK_START 32
60#define CMD33_ERASE_WR_BLK_END 33
61#define CMD35_ERASE_GROUP_START 35
62#define CMD36_ERASE_GROUP_END 36
63#define CMD38_ERASE 38
64
65/* Card type */
66#define MMC_TYPE_STD_SD 0
67#define MMC_TYPE_SDHC 1
68#define MMC_TYPE_SDIO 2
69#define MMC_TYPE_MMCHC 3
70#define MMC_TYPE_STD_MMC 4
71
72/* OCR Register */
73#define MMC_OCR_17_19 (1 << 7)
74#define MMC_OCR_27_36 (0x1FF << 15)
75#define MMC_OCR_SEC_MODE (2 << 29)
76#define MMC_OCR_BUSY (1 << 31)
77
78/* Card status */
79#define MMC_CARD_STATUS(x) ((x >> 9) & 0x0F)
80#define MMC_TRAN_STATE 4
81#define MMC_PROG_STATE 7
82#define MMC_SWITCH_FUNC_ERR_FLAG (1 << 7)
83#define MMC_STATUS_INACTIVE 0
84#define MMC_STATUS_ACTIVE 1
Channagoud Kadabi003171e2013-05-29 15:21:12 -070085#define MMC_READY_FOR_DATA (1 << 8)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070086
87/* EXT_CSD */
88/* Offsets in the ext csd */
89#define MMC_EXT_MMC_BUS_WIDTH 183
90#define MMC_EXT_MMC_HS_TIMING 185
91#define MMC_DEVICE_TYPE 196
92#define MMC_EXT_HC_WP_GRP_SIZE 221
93#define MMC_SEC_COUNT4 215
94#define MMC_SEC_COUNT3 214
95#define MMC_SEC_COUNT2 213
96#define MMC_SEC_COUNT1 212
97#define MMC_PART_CONFIG 179
98#define MMC_ERASE_GRP_DEF 175
99#define MMC_USR_WP 171
Channagoud Kadabi003171e2013-05-29 15:21:12 -0700100#define MMC_HC_ERASE_GRP_SIZE 224
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700101
102/* Values for ext csd fields */
103#define MMC_HS_TIMING 0x1
104#define MMC_HS200_TIMING 0x2
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700105#define MMC_HS400_TIMING 0x3
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700106#define MMC_ACCESS_WRITE 0x3
Channagoud Kadabi003171e2013-05-29 15:21:12 -0700107#define MMC_SET_BIT 0x1
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700108#define MMC_HS_DDR_MODE (BIT(2) | BIT(3))
109#define MMC_HS_HS200_MODE (BIT(4) | BIT(5))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700110#define MMC_HS_HS400_MODE (BIT(6) | BIT(7))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700111#define MMC_SEC_COUNT4_SHIFT 24
112#define MMC_SEC_COUNT3_SHIFT 16
113#define MMC_SEC_COUNT2_SHIFT 8
Channagoud Kadabi003171e2013-05-29 15:21:12 -0700114#define MMC_HC_ERASE_MULT (512 * 1024)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700115
116/* Command related */
117#define MMC_MAX_COMMAND_RETRY 1000
Channagoud Kadabi003171e2013-05-29 15:21:12 -0700118#define MMC_MAX_CARD_STAT_RETRY 10000
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700119#define MMC_RD_BLOCK_LEN 512
120#define MMC_WR_BLOCK_LEN 512
Channagoud Kadabi003171e2013-05-29 15:21:12 -0700121#define MMC_R1_WP_ERASE_SKIP BIT(15)
122#define MMC_US_PERM_WP_DIS BIT(4)
123#define MMC_US_PWR_WP_DIS BIT(3)
124#define MMC_US_PERM_WP_EN BIT(2)
125#define MMC_US_PWR_WP_EN BIT(0)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700126
Channagoud Kadabi14fd2052013-10-17 18:00:50 -0700127/* MMC errors */
128#define MMC_R1_BLOCK_LEN_ERR (1 << 29)
129#define MMC_R1_ADDR_ERR (1 << 30)
130#define MMC_R1_GENERIC_ERR (1 << 19)
131#define MMC_R1_CC_ERROR (1 << 20)
132#define MMC_R1_WP_VIOLATION (1 << 26)
133#define MMC_R1_ADDR_OUT_OF_RANGE (1 << 31)
134
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700135/* RCA of the card */
136#define MMC_RCA 2
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -0700137#define MMC_CARD_RCA_BIT 16
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700138
139/* Misc card macros */
140#define MMC_BLK_SZ 512
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -0700141#define MMC_CARD_SLEEP (1 << 15)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700142
143/* Clock rates */
144#define MMC_CLK_400KHZ 400000
145#define MMC_CLK_144KHZ 144000
146#define MMC_CLK_20MHZ 20000000
147#define MMC_CLK_25MHZ 25000000
148#define MMC_CLK_48MHZ 48000000
149#define MMC_CLK_50MHZ 49152000
150#define MMC_CLK_96MHZ 96000000
151#define MMC_CLK_200MHZ 200000000
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700152#define MMC_CLK_192MHZ 192000000
153#define MMC_CLK_400MHZ 400000000
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700154
Channagoud Kadabi003171e2013-05-29 15:21:12 -0700155#define MMC_ADDR_OUT_OF_RANGE(resp) ((resp >> 31) & 0x01)
156
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700157/* SD card related Macros */
158/* Arguments for commands */
159#define MMC_SD_HC_VOLT_SUPPLIED 0x000001AA
160#define MMC_SD_OCR 0x00FF8000
161#define MMC_SD_HC_HCS 0x40000000
162#define MMC_SD_DEV_READY 0x80000000
163#define MMC_CARD_TYPE_SDHC 0x1
164#define MMC_CARD_TYPE_STD_SD 0x0
165#define SD_CARD_RCA 0x0
166#define MMC_SD_SWITCH_HS 0x80FFFFF1
167
168#define SD_CMD8_MAX_RETRY 0x3
169#define SD_ACMD41_MAX_RETRY 0x14
170
171/* SCR(SD Card Register) related */
172#define SD_SCR_BUS_WIDTH 16
173#define SD_SCR_SD_SPEC 24
174#define SD_SCR_SD_SPEC3 15
175#define SD_SCR_BUS_WIDTH_MASK 0xf0000
176#define SD_SCR_SD_SPEC_MASK 0x0f000000
177#define SD_SCR_SD_SPEC3_MASK 0x8000
178#define SD_SCR_CMD23_SUPPORT BIT(1)
179#define SD_SCR_WIDTH_4BIT BIT(2)
180
181/* SSR related macros */
182#define MMC_SD_AU_SIZE_BIT 428
183#define MMC_SD_AU_SIZE_LEN 4
184#define MMC_SD_ERASE_SIZE_BIT 408
185#define MMC_SD_ERASE_SIZE_LEN 16
186
187/* Commands for SD card */
188#define CMD8_SEND_IF_COND 8
189#define ACMD6_SET_BUS_WIDTH 6
190#define ACMD13_SEND_SD_STATUS 13
191#define ACMD41_SEND_OP_COND 41
192#define ACMD51_READ_CARD_SCR 51
193#define CMD55_APP_CMD 55
194
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700195#define MMC_SAVE_TIMING(host, TIMING) host->timing = TIMING
196
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700197/* Can be used to unpack array of upto 32 bits data */
198#define UNPACK_BITS(array, start, len, size_of) \
199 ({ \
200 uint32_t indx = (start) / (size_of); \
201 uint32_t offset = (start) % (size_of); \
202 uint32_t mask = (((len)<(size_of))? 1<<(len):0) - 1; \
203 uint32_t unpck = array[indx] >> offset; \
204 uint32_t indx2 = ((start) + (len) - 1) / (size_of); \
205 if(indx2 > indx) \
206 unpck |= array[indx2] << ((size_of) - offset); \
207 unpck & mask; \
208 })
209
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700210#define swap_endian32(x) \
211 ((uint32_t)( \
212 (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
213 (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
214 (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
215 (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24) ))
216
217
218#define MMC_CARD_SD(card) ((card->type == MMC_CARD_TYPE_SDHC) || \
219 (card->type == MMC_CARD_TYPE_STD_SD))
220
221#define MMC_CARD_MMC(card) ((card->type == MMC_TYPE_STD_MMC) || \
222 (card->type == MMC_TYPE_MMCHC))
223
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700224/* CSD Register.
225 * Note: not all the fields have been defined here
226 */
227struct mmc_csd {
228 uint32_t cmmc_structure;
229 uint32_t spec_vers;
230 uint32_t card_cmd_class;
231 uint32_t write_blk_len;
232 uint32_t read_blk_len;
233 uint32_t r2w_factor;
234 uint32_t sector_size;
235 uint32_t c_size_mult;
236 uint32_t c_size;
237 uint32_t nsac_clk_cycle;
238 uint32_t taac_ns;
239 uint32_t tran_speed;
240 uint32_t erase_grp_size;
241 uint32_t erase_grp_mult;
242 uint32_t wp_grp_size;
243 uint32_t wp_grp_enable:1;
244 uint32_t perm_wp:1;
245 uint32_t temp_wp:1;
246 uint32_t erase_blk_len:1;
247 uint32_t read_blk_misalign:1;
248 uint32_t write_blk_misalign:1;
249 uint32_t read_blk_partial:1;
250 uint32_t write_blk_partial:1;
251};
252
253/* CID Register */
254struct mmc_cid {
255 uint32_t mid; /* 8 bit manufacturer id */
256 uint32_t oid; /* 16 bits 2 character ASCII - OEM ID */
257 uint8_t pnm[7]; /* 6 character ASCII - product name */
258 uint32_t prv; /* 8 bits - product revision */
259 uint32_t psn; /* 32 bits - product serial number */
260 uint32_t month; /* 4 bits manufacturing month */
261 uint32_t year; /* 4 bits manufacturing year */
262};
263
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700264/* SCR register for SD card */
265struct mmc_sd_scr {
266 uint32_t bus_widths; /* Bus width support, 8 or 1 bit */
267 uint32_t sd_spec; /* sd spec version */
268 uint32_t sd3_spec; /* sd spec 3 version */
269 uint32_t cmd23_support; /* cmd23 supported or not */
270};
271
272/* SD Status Register */
273struct mmc_sd_ssr {
274 uint32_t au_size; /* Allocation unit (AU) size */
275 uint32_t num_aus; /* Number of AUs */
276};
277
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700278/* mmc card register */
279struct mmc_card {
280 uint32_t rca; /* Relative addres of the card*/
281 uint32_t ocr; /* Operating range of the card*/
Channagoud Kadabi96c629e2013-09-10 14:21:30 -0700282 uint32_t block_size; /* Block size for the card */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700283 uint64_t capacity; /* card capacity */
284 uint32_t type; /* Type of the card */
285 uint32_t status; /* Card status */
286 uint8_t *ext_csd; /* Ext CSD for the card info */
287 uint32_t raw_csd[4]; /* Raw CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700288 uint32_t raw_scr[2]; /* SCR for SD card */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700289 struct mmc_cid cid; /* CID structure */
290 struct mmc_csd csd; /* CSD structure */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700291 struct mmc_sd_scr scr; /* SCR structure */
292 struct mmc_sd_ssr ssr; /* SSR Register */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700293};
294
295/* mmc device config data */
296struct mmc_config_data {
297 uint8_t slot; /* Sdcc slot used */
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -0700298 uint32_t pwr_irq; /* Power Irq from card to host */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700299 uint32_t sdhc_base; /* Base address for the sdhc */
300 uint32_t pwrctl_base; /* Base address for power control registers */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700301 uint16_t bus_width; /* Bus width used */
302 uint32_t max_clk_rate; /* Max clock rate supported */
303};
304
305/* mmc device structure */
306struct mmc_device {
307 struct sdhci_host host; /* Handle to host controller */
308 struct mmc_card card; /* Handle to mmc card */
309 struct mmc_config_data config; /* Handle for the mmc config data */
310};
311
312/*
313 * APIS exposed to block level driver
314 */
315/* API: Initialize the mmc card */
316struct mmc_device *mmc_init(struct mmc_config_data *);
317/* API: Read required number of blocks from card into destination */
318uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest, uint64_t blk_addr, uint32_t num_blocks);
319/* API: Write requried number of blocks from source to card */
320uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src, uint64_t blk_addr, uint32_t num_blocks);
Channagoud Kadabi003171e2013-05-29 15:21:12 -0700321/* API: Erase len bytes (after converting to number of erase groups), from specified address */
322uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len);
323/* API: Write protect or release len bytes (after converting to number of write protect groups) from specified start address*/
324uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr);
325/* API: Get the WP status of write protect groups starting at addr */
326uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status);
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -0700327/* API: Put the mmc card in sleep mode */
328void mmc_put_card_to_sleep(struct mmc_device *dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700329#endif