Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are met: |
| 5 | * * Redistributions of source code must retain the above copyright |
| 6 | * notice, this list of conditions and the following disclaimer. |
| 7 | * * Redistributions in binary form must reproduce the above copyright |
| 8 | * notice, this list of conditions and the following disclaimer in the |
| 9 | * documentation and/or other materials provided with the distribution. |
| 10 | * * Neither the name of The Linux Foundation nor |
| 11 | * the names of its contributors may be used to endorse or promote |
| 12 | * products derived from this software without specific prior written |
| 13 | * permission. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 16 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 17 | * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 18 | * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| 19 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 20 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 21 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| 22 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 23 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 24 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 25 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 26 | */ |
| 27 | |
| 28 | #include <mdp5.h> |
| 29 | #include <debug.h> |
| 30 | #include <reg.h> |
| 31 | #include <target/display.h> |
| 32 | #include <platform/timer.h> |
| 33 | #include <platform/iomap.h> |
| 34 | #include <dev/lcdc.h> |
| 35 | #include <dev/fbcon.h> |
| 36 | #include <bits.h> |
| 37 | #include <msm_panel.h> |
| 38 | #include <mipi_dsi.h> |
| 39 | #include <err.h> |
| 40 | #include <clock.h> |
| 41 | #include <mdp5.h> |
Siddhartha Agrawal | 8d69082 | 2013-01-28 12:18:58 -0800 | [diff] [blame] | 42 | #include <scm.h> |
| 43 | |
| 44 | int restore_secure_cfg(uint32_t id); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 45 | |
| 46 | static int mdp_rev; |
| 47 | |
| 48 | void mdp_set_revision(int rev) |
| 49 | { |
| 50 | mdp_rev = rev; |
| 51 | } |
| 52 | |
| 53 | int mdp_get_revision() |
| 54 | { |
| 55 | return mdp_rev; |
| 56 | } |
| 57 | |
| 58 | void mdp_clk_gating_ctrl(void) |
| 59 | { |
| 60 | writel(0x40000000, MDP_CLK_CTRL0); |
| 61 | udelay(20); |
| 62 | writel(0x40000040, MDP_CLK_CTRL0); |
| 63 | writel(0x40000000, MDP_CLK_CTRL1); |
| 64 | writel(0x00400000, MDP_CLK_CTRL3); |
| 65 | udelay(20); |
| 66 | writel(0x00404000, MDP_CLK_CTRL3); |
| 67 | writel(0x40000000, MDP_CLK_CTRL4); |
| 68 | } |
| 69 | |
| 70 | int mdp_dsi_video_config(struct msm_panel_info *pinfo, |
| 71 | struct fbcon_config *fb) |
| 72 | { |
| 73 | int ret = NO_ERROR; |
| 74 | uint32_t hsync_period, vsync_period; |
| 75 | uint32_t hsync_start_x, hsync_end_x; |
| 76 | uint32_t display_hctl, active_hctl, hsync_ctl, display_vstart, display_vend; |
| 77 | struct lcdc_panel_info *lcdc = NULL; |
| 78 | unsigned mdp_rgb_size; |
Siddhartha Agrawal | 8d69082 | 2013-01-28 12:18:58 -0800 | [diff] [blame] | 79 | int access_secure = 0; |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 80 | |
| 81 | if (pinfo == NULL) |
| 82 | return ERR_INVALID_ARGS; |
| 83 | |
| 84 | lcdc = &(pinfo->lcdc); |
| 85 | if (lcdc == NULL) |
| 86 | return ERR_INVALID_ARGS; |
| 87 | |
| 88 | hsync_period = lcdc->h_pulse_width + |
| 89 | lcdc->h_back_porch + |
| 90 | pinfo->xres + lcdc->xres_pad + lcdc->h_front_porch; |
| 91 | vsync_period = (lcdc->v_pulse_width + |
| 92 | lcdc->v_back_porch + |
| 93 | pinfo->yres + lcdc->yres_pad + |
| 94 | lcdc->v_front_porch); |
| 95 | |
| 96 | hsync_start_x = |
| 97 | lcdc->h_pulse_width + |
| 98 | lcdc->h_back_porch; |
| 99 | hsync_end_x = |
| 100 | hsync_period - lcdc->h_front_porch - 1; |
| 101 | |
| 102 | display_vstart = (lcdc->v_pulse_width + |
| 103 | lcdc->v_back_porch) |
| 104 | * hsync_period + lcdc->hsync_skew; |
| 105 | display_vend = ((vsync_period - lcdc->v_front_porch) * hsync_period) |
| 106 | +lcdc->hsync_skew - 1; |
| 107 | |
| 108 | hsync_ctl = (hsync_period << 16) | lcdc->h_pulse_width; |
| 109 | display_hctl = (hsync_end_x << 16) | hsync_start_x; |
| 110 | |
| 111 | /* write active region size*/ |
| 112 | mdp_rgb_size = (fb->height << 16) + fb->width; |
| 113 | |
Siddhartha Agrawal | 8d69082 | 2013-01-28 12:18:58 -0800 | [diff] [blame] | 114 | access_secure = restore_secure_cfg(SECURE_DEVICE_MDSS); |
| 115 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 116 | mdp_clk_gating_ctrl(); |
| 117 | |
Siddhartha Agrawal | f058d62 | 2013-01-28 16:21:03 -0800 | [diff] [blame] | 118 | /* Ignore TZ return value till it's fixed */ |
| 119 | if (!access_secure || 1) { |
Siddhartha Agrawal | 8d69082 | 2013-01-28 12:18:58 -0800 | [diff] [blame] | 120 | /* Force VBIF Clocks on */ |
| 121 | writel(0x1, VBIF_VBIF_DDR_FORCE_CLK_ON); |
| 122 | /* Configure DDR burst length */ |
| 123 | writel(0x00000707, VBIF_VBIF_DDR_OUT_MAX_BURST); |
Siddhartha Agrawal | f058d62 | 2013-01-28 16:21:03 -0800 | [diff] [blame] | 124 | writel(0x00000030, VBIF_VBIF_DDR_ARB_CTRL ); |
| 125 | writel(0x00000001, VBIF_VBIF_DDR_RND_RBN_QOS_ARB); |
| 126 | writel(0x00000FFF, VBIF_VBIF_DDR_OUT_AOOO_AXI_EN); |
| 127 | writel(0x0FFF0FFF, VBIF_VBIF_DDR_OUT_AX_AOOO); |
| 128 | writel(0x22222222, VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0); |
| 129 | writel(0x00002222, VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1); |
Siddhartha Agrawal | 8d69082 | 2013-01-28 12:18:58 -0800 | [diff] [blame] | 130 | } |
| 131 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 132 | /* Allocate SMP blocks */ |
| 133 | writel(0x00101010, MMSS_MDP_SMP_ALLOC_W_0); |
| 134 | writel(0x00000010, MMSS_MDP_SMP_ALLOC_W_1); |
| 135 | writel(0x00101010, MMSS_MDP_SMP_ALLOC_R_0); |
| 136 | writel(0x00000010, MMSS_MDP_SMP_ALLOC_R_1); |
| 137 | |
| 138 | writel(hsync_ctl, MDP_INTF_1_HSYNC_CTL); |
| 139 | writel(vsync_period*hsync_period, MDP_INTF_1_VSYNC_PERIOD_F0); |
| 140 | writel(0x00, MDP_INTF_1_VSYNC_PERIOD_F1); |
| 141 | writel(lcdc->v_pulse_width*hsync_period, MDP_INTF_1_VSYNC_PULSE_WIDTH_F0); |
| 142 | writel(0x00, MDP_INTF_1_VSYNC_PULSE_WIDTH_F1); |
| 143 | writel(display_hctl, MDP_INTF_1_DISPLAY_HCTL); |
| 144 | writel(display_vstart, MDP_INTF_1_DISPLAY_V_START_F0); |
| 145 | writel(0x00, MDP_INTF_1_DISPLAY_V_START_F1); |
| 146 | writel(display_vend, MDP_INTF_1_DISPLAY_V_END_F0); |
| 147 | writel(0x00, MDP_INTF_1_DISPLAY_V_END_F1); |
| 148 | writel(0x00, MDP_INTF_1_ACTIVE_HCTL); |
| 149 | writel(0x00, MDP_INTF_1_ACTIVE_V_START_F0); |
| 150 | writel(0x00, MDP_INTF_1_ACTIVE_V_START_F1); |
| 151 | writel(0x00, MDP_INTF_1_ACTIVE_V_END_F0); |
| 152 | writel(0x00, MDP_INTF_1_ACTIVE_V_END_F1); |
| 153 | writel(0xFF, MDP_INTF_1_UNDERFFLOW_COLOR); |
| 154 | |
| 155 | writel(fb->base, MDP_VP_0_RGB_0_SSPP_SRC0_ADDR); |
| 156 | writel((fb->stride * fb->bpp/8),MDP_VP_0_RGB_0_SSPP_SRC_YSTRIDE); |
| 157 | writel(mdp_rgb_size, MDP_VP_0_RGB_0_SSPP_SRC_IMG_SIZE); |
| 158 | writel(mdp_rgb_size, MDP_VP_0_RGB_0_SSPP_SRC_SIZE); |
| 159 | writel(mdp_rgb_size, MDP_VP_0_RGB_0_SSPP_SRC_OUT_SIZE); |
| 160 | writel(0x00, MDP_VP_0_RGB_0_SSPP_SRC_XY); |
| 161 | writel(0x00, MDP_VP_0_RGB_0_SSPP_OUT_XY); |
| 162 | /* Tight Packing 3bpp 0-Alpha 8-bit R B G */ |
| 163 | writel(0x0002243F, MDP_VP_0_RGB_0_SSPP_SRC_FORMAT); |
| 164 | writel(0x00020001, MDP_VP_0_RGB_0_SSPP_SRC_UNPACK_PATTERN); |
| 165 | writel(0x00, MDP_VP_0_RGB_0_SSPP_SRC_OP_MODE); |
| 166 | |
| 167 | writel(mdp_rgb_size,MDP_VP_0_LAYER_0_OUT_SIZE); |
| 168 | writel(0x00, MDP_VP_0_LAYER_0_OP_MODE); |
| 169 | writel(0x100, MDP_VP_0_LAYER_0_BLEND_OP); |
| 170 | writel(0xFF, MDP_VP_0_LAYER_0_BLEND0_FG_ALPHA); |
| 171 | writel(0x100, MDP_VP_0_LAYER_1_BLEND_OP); |
| 172 | writel(0xFF, MDP_VP_0_LAYER_1_BLEND0_FG_ALPHA); |
| 173 | writel(0x100, MDP_VP_0_LAYER_2_BLEND_OP); |
| 174 | writel(0xFF, MDP_VP_0_LAYER_2_BLEND0_FG_ALPHA); |
| 175 | writel(0x100, MDP_VP_0_LAYER_3_BLEND_OP); |
| 176 | writel(0xFF, MDP_VP_0_LAYER_3_BLEND0_FG_ALPHA); |
| 177 | |
| 178 | /* Baselayer for layer mixer 0 */ |
| 179 | writel(0x010000200, MDP_CTL_0_LAYER_0); |
| 180 | |
| 181 | writel(0x1F20, MDP_CTL_0_TOP); |
| 182 | writel(0x213F, MDP_INTF_1_PANEL_FORMAT); |
| 183 | |
| 184 | writel(0x0100, MDP_DISP_INTF_SEL); |
| 185 | writel(0x1111, MDP_VIDEO_INTF_UNDERFLOW_CTL); |
| 186 | writel(0x01, MDP_UPPER_NEW_ROI_PRIOR_RO_START); |
| 187 | writel(0x01, MDP_LOWER_NEW_ROI_PRIOR_TO_START); |
| 188 | |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | int mdp_dsi_cmd_config(struct msm_panel_info *pinfo, |
| 193 | struct fbcon_config *fb) |
| 194 | { |
| 195 | |
| 196 | int ret = 0; |
| 197 | return ret; |
| 198 | } |
| 199 | |
| 200 | int mdp_dsi_video_on(void) |
| 201 | { |
| 202 | int ret = NO_ERROR; |
| 203 | writel(0x32048, MDP_CTL_0_FLUSH); |
| 204 | writel(0x01, MDP_INTF_1_TIMING_ENGINE_EN); |
| 205 | return ret; |
| 206 | } |
| 207 | |
| 208 | int mdp_dsi_video_off() |
| 209 | { |
| 210 | if(!target_cont_splash_screen()) |
| 211 | { |
| 212 | writel(0x00000000, MDP_INTF_1_TIMING_ENGINE_EN); |
| 213 | mdelay(60); |
| 214 | /* Ping-Pong done Tear Check Read/Write */ |
| 215 | /* Underrun(Interface 0/1/2/3) VSYNC Interrupt Enable */ |
| 216 | writel(0xFF777713, MDP_INTR_CLEAR); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 217 | } |
| 218 | |
Siddhartha Agrawal | 6a59822 | 2013-02-17 18:33:27 -0800 | [diff] [blame] | 219 | writel(0x00000000, MDP_INTR_EN); |
| 220 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 221 | return NO_ERROR; |
| 222 | } |
| 223 | |
| 224 | int mdp_dsi_cmd_off() |
| 225 | { |
| 226 | return NO_ERROR; |
| 227 | } |
| 228 | |
| 229 | int mdp_dma_on(void) |
| 230 | { |
| 231 | return NO_ERROR; |
| 232 | } |
| 233 | |
| 234 | void mdp_disable(void) |
| 235 | { |
| 236 | |
| 237 | } |