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wangxl1ddbd092015-02-03 20:31:24 +08001/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions
5 * are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in
10 * the documentation and/or other materials provided with the
11 * distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
19 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
20 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
23 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <smem.h>
32#include <err.h>
33#include <msm_panel.h>
34#include <mipi_dsi.h>
35#include <pm8x41.h>
36#include <pm8x41_wled.h>
37#include <board.h>
38#include <mdp5.h>
39#include <platform/gpio.h>
40#include <platform/clock.h>
41#include <platform/iomap.h>
42#include <target/display.h>
43#include "include/panel.h"
44#include "include/display_resource.h"
45
46static struct msm_fb_panel_data panel;
47static uint8_t edp_enable;
48
49#define HFPLL_LDO_ID 12
50
51static struct pm8x41_wled_data wled_ctrl = {
52 .mod_scheme = 0x00,
53 .led1_brightness = (0x0F << 8) | 0xEF,
54 .led2_brightness = (0x0F << 8) | 0xEF,
55 .led3_brightness = (0x0F << 8) | 0xEF,
56 .max_duty_cycle = 0x01,
57 .ovp = 0x2,
58 .full_current_scale = 0x19
59};
60
61static uint32_t dsi_pll_lock_status(uint32_t ctl_base)
62{
63 uint32_t counter, status;
64
65 udelay(100);
66 mdss_dsi_uniphy_pll_lock_detect_setting(ctl_base);
67
68 status = readl(ctl_base + 0x02c0) & 0x01;
69 for (counter = 0; counter < 5 && !status; counter++) {
70 udelay(100);
71 status = readl(ctl_base + 0x02c0) & 0x01;
72 }
73
74 return status;
75}
76
77static uint32_t dsi_pll_enable_seq_b(uint32_t ctl_base)
78{
79 mdss_dsi_uniphy_pll_sw_reset(ctl_base);
80
81 writel(0x01, ctl_base + 0x0220); /* GLB CFG */
82 udelay(1);
83 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
84 udelay(200);
85 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
86 udelay(500);
87 writel(0x0f, ctl_base + 0x0220); /* GLB CFG */
88 udelay(500);
89
90 return dsi_pll_lock_status(ctl_base);
91}
92
93static uint32_t dsi_pll_enable_seq_d(uint32_t ctl_base)
94{
95 mdss_dsi_uniphy_pll_sw_reset(ctl_base);
96
97 writel(0x01, ctl_base + 0x0220); /* GLB CFG */
98 udelay(1);
99 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
100 udelay(200);
101 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
102 udelay(250);
103 writel(0x05, ctl_base + 0x0220); /* GLB CFG */
104 udelay(200);
105 writel(0x07, ctl_base + 0x0220); /* GLB CFG */
106 udelay(500);
107 writel(0x0f, ctl_base + 0x0220); /* GLB CFG */
108 udelay(500);
109
110 return dsi_pll_lock_status(ctl_base);
111}
112
113static void dsi_pll_enable_seq(uint32_t ctl_base)
114{
115 uint32_t counter, status;
116
117 for (counter = 0; counter < 3; counter++) {
118 status = dsi_pll_enable_seq_b(ctl_base);
119 if (status)
120 break;
121 status = dsi_pll_enable_seq_d(ctl_base);
122 if (status)
123 break;
124 status = dsi_pll_enable_seq_d(ctl_base);
125 if(status)
126 break;
127 }
128
129 if (!status)
130 dprintf(CRITICAL, "Pll lock sequence failed\n");
131}
132
133static int msm8974_wled_backlight_ctrl(uint8_t enable)
134{
135 uint32_t platform_id = board_platform_id();
136 uint32_t hardware_id = board_hardware_id();
137 uint8_t slave_id = 1;
138
139 if (enable) {
140 if (platform_id == MSM8974AC)
141 if ((hardware_id == HW_PLATFORM_MTP)
142 || (hardware_id == HW_PLATFORM_LIQUID))
143 slave_id = 3;
144
145 pm8x41_wled_config_slave_id(slave_id);
146 pm8x41_wled_config(&wled_ctrl);
147 pm8x41_wled_sink_control(enable);
148 pm8x41_wled_iled_sync_control(enable);
149 pm8x41_wled_led_mod_enable(enable);
150 }
151 pm8x41_wled_enable(enable);
152
153 return NO_ERROR;
154}
155
156static int msm8974_pwm_backlight_ctrl(int gpio_num, int lpg_chan, int enable)
157{
158 struct pm8x41_gpio gpio_param = {
159 .direction = PM_GPIO_DIR_OUT,
160 .function = PM_GPIO_FUNC_2,
161 .vin_sel = 2, /* VIN_2 */
162 .pull = PM_GPIO_PULL_UP_1_5 | PM_GPIO_PULLDOWN_10,
163 .output_buffer = PM_GPIO_OUT_CMOS,
164 .out_strength = PM_GPIO_OUT_DRIVE_HIGH,
165 };
166
167 dprintf(SPEW, "%s: gpio=%d lpg=%d enable=%d\n", __func__,
168 gpio_num, lpg_chan, enable);
169
170 if (enable) {
171 pm8x41_gpio_config(gpio_num, &gpio_param);
172 pm8x41_lpg_write(lpg_chan, 0x41, 0x33); /* LPG_PWM_SIZE_CLK, */
173 pm8x41_lpg_write(lpg_chan, 0x42, 0x01); /* LPG_PWM_FREQ_PREDIV */
174 pm8x41_lpg_write(lpg_chan, 0x43, 0x20); /* LPG_PWM_TYPE_CONFIG */
175 pm8x41_lpg_write(lpg_chan, 0x44, 0xb2); /* LPG_VALUE_LSB */
176 pm8x41_lpg_write(lpg_chan, 0x45, 0x01); /* LPG_VALUE_MSB */
177 pm8x41_lpg_write(lpg_chan, 0x46, 0xe4); /* LPG_ENABLE_CONTROL */
178 } else {
179 pm8x41_lpg_write(lpg_chan, 0x46, 0x00);
180 }
181
182 return NO_ERROR;
183}
184
185int target_backlight_ctrl(struct backlight *bl, uint8_t enable)
186{
187 uint32_t ret = NO_ERROR;
188
189 if (!bl) {
190 dprintf(CRITICAL, "backlight structure is not available\n");
191 return ERR_INVALID_ARGS;
192 }
193
194 switch (bl->bl_interface_type) {
195 case BL_WLED:
196 ret = msm8974_wled_backlight_ctrl(enable);
197 break;
198 case BL_PWM:
199 ret = msm8974_pwm_backlight_ctrl(pwm_gpio.pin_id,
200 PWM_BL_LPG_CHAN_ID,
201 enable);
202 break;
203 default:
204 dprintf(CRITICAL, "backlight type:%d not supported\n",
205 bl->bl_interface_type);
206 return ERR_NOT_SUPPORTED;
207 }
208
209 return ret;
210}
211
212int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo)
213{
214 struct mdss_dsi_pll_config *pll_data;
215 uint32_t dual_dsi = pinfo->mipi.dual_dsi;
216 dprintf(SPEW, "target_panel_clock\n");
217
218 pll_data = pinfo->mipi.dsi_pll_config;
219 if (enable) {
220 mdp_gdsc_ctrl(enable);
221 mdp_clock_init();
222 mdss_dsi_auto_pll_config(MIPI_DSI0_BASE, pll_data);
223 dsi_pll_enable_seq(MIPI_DSI0_BASE);
224 mmss_clock_auto_pll_init(DSI0_PHY_PLL_OUT, dual_dsi,
225 pll_data->pclk_m,
226 pll_data->pclk_n,
227 pll_data->pclk_d);
228 } else if(!target_cont_splash_screen()) {
229 // * Add here for continuous splash *
230 mmss_clock_disable(dual_dsi);
231 mdp_clock_disable(dual_dsi);
232 }
233
234 return NO_ERROR;
235}
236
237/* Pull DISP_RST_N high to get panel out of reset */
238int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq,
239 struct msm_panel_info *pinfo)
240{
241 uint32_t rst_gpio = reset_gpio.pin_id;
242 uint32_t platform_id = board_platform_id();
243 uint32_t hardware_id = board_hardware_id();
244
245 struct pm8x41_gpio resetgpio_param = {
246 .direction = PM_GPIO_DIR_OUT,
247 .output_buffer = PM_GPIO_OUT_CMOS,
dongzq0414a568ba42015-08-12 17:32:10 +0800248 .out_strength = PM_GPIO_OUT_DRIVE_LOW,
wangxl1ddbd092015-02-03 20:31:24 +0800249 };
250
251 if (platform_id == MSM8974AC)
252 if ((hardware_id == HW_PLATFORM_MTP)
253 || (hardware_id == HW_PLATFORM_LIQUID))
254 rst_gpio = 20;
255
256 dprintf(SPEW, "platform_id: %u, rst_gpio: %u\n",
257 platform_id, rst_gpio);
258
259 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
260 if (enable) {
wangxl1ddbd092015-02-03 20:31:24 +0800261
wangxl1ddbd092015-02-03 20:31:24 +0800262 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[0]);
263 mdelay(resetseq->sleep[0]);
264 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[1]);
265 mdelay(resetseq->sleep[1]);
266 pm8x41_gpio_set(rst_gpio, resetseq->pin_state[2]);
267 mdelay(resetseq->sleep[2]);
268 } else {
269 resetgpio_param.out_strength = PM_GPIO_OUT_DRIVE_LOW;
270 pm8x41_gpio_config(rst_gpio, &resetgpio_param);
271 pm8x41_gpio_set(rst_gpio, PM_GPIO_FUNC_LOW);
272 gpio_set(enable_gpio.pin_id, resetseq->pin_direction);
273 }
274 return NO_ERROR;
275}
276
277int target_ldo_ctrl(uint8_t enable)
278{
279 uint32_t ldocounter = 0;
280 uint32_t pm8x41_ldo_base = 0x13F00;
281
282 while (ldocounter < TOTAL_LDO_DEFINED) {
283 struct pm8x41_ldo ldo_entry = LDO((pm8x41_ldo_base +
284 0x100 * ldo_entry_array[ldocounter].ldo_id),
285 ldo_entry_array[ldocounter].ldo_type);
286
287 dprintf(SPEW, "Setting %s\n",
288 ldo_entry_array[ldocounter].ldo_id);
289
290 /* Set voltage during power on */
291 if (enable) {
292 pm8x41_ldo_set_voltage(&ldo_entry,
293 ldo_entry_array[ldocounter].ldo_voltage);
294 pm8x41_ldo_control(&ldo_entry, enable);
295 } else if(ldo_entry_array[ldocounter].ldo_id != HFPLL_LDO_ID) {
296 pm8x41_ldo_control(&ldo_entry, enable);
297 }
298 ldocounter++;
299 }
dongzq0414a568ba42015-08-12 17:32:10 +0800300 gpio_tlmm_config(enable_gpio.pin_id, 0,
301 enable_gpio.pin_direction, enable_gpio.pin_pull,
302 enable_gpio.pin_strength, enable_gpio.pin_state);
wangxl1ddbd092015-02-03 20:31:24 +0800303
dongzq0414a568ba42015-08-12 17:32:10 +0800304 gpio_set(enable_gpio.pin_id,2);
wangxl1ddbd092015-02-03 20:31:24 +0800305 return NO_ERROR;
306}
307
308static int msm8974_mdss_edp_panel_clock(int enable)
309{
310 if (enable) {
311 mdp_gdsc_ctrl(enable);
312 mdp_clock_init();
313 edp_clk_enable();
314 } else if (!target_cont_splash_screen()) {
315 /* Add here for continuous splash */
316 edp_clk_disable();
317 mdp_clock_disable();
318 mdp_gdsc_ctrl(enable);
319 }
320
321 return 0;
322}
323
324static int msm8974_edp_panel_power(int enable)
325{
326 struct pm8x41_gpio gpio36_param = {
327 .direction = PM_GPIO_DIR_OUT,
328 .function = PM_GPIO_FUNC_2,
329 .vin_sel = 2, /* VIN_2 */
330 .pull = PM_GPIO_PULL_UP_1_5 | PM_GPIO_PULLDOWN_10,
331 .output_buffer = PM_GPIO_OUT_CMOS,
332 .out_strength = PM_GPIO_OUT_DRIVE_HIGH,
333 };
334
335 struct pm8x41_ldo ldo12 = LDO(PM8x41_LDO12, PLDO_TYPE);
336
337 if (enable) {
338 /* Enable backlight */
339 dprintf(SPEW, "Enable Backlight\n");
340 msm8974_pwm_backlight_ctrl(36, 8, 1);
341 dprintf(SPEW, "Enable Backlight Done\n");
342
343 /* Turn on LDO12 for edp vdda */
344 dprintf(SPEW, "Setting LDO12 n");
345 pm8x41_ldo_set_voltage(&ldo12, 1800000);
346 pm8x41_ldo_control(&ldo12, enable);
347 dprintf(SPEW, "Setting LDO12 Done\n");
348
349 /* Panel Enable */
350 dprintf(SPEW, "Panel Enable\n");
351 gpio_tlmm_config(58, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA,
352 GPIO_DISABLE);
353 gpio_set(58, 2);
354 dprintf(SPEW, "Panel Enable Done\n");
355 } else {
356 /* Keep LDO12 on, otherwise kernel will not boot */
357 gpio_set(58, 0);
358 msm8974_pwm_backlight_ctrl(36, 8, 0);
359 }
360
361 return 0;
362}
363
364void target_display_init(const char *panel_name)
365{
366 uint32_t hw_id = board_hardware_id();
367 uint32_t panel_loop = 0;
368 uint32_t ret = 0;
369 switch (hw_id) {
370 case HW_PLATFORM_LIQUID:
371 edp_panel_init(&(panel.panel_info));
372 panel.clk_func = msm8974_mdss_edp_panel_clock;
373 panel.power_func = msm8974_edp_panel_power;
374 panel.fb.base = (void *)EDP_FB_ADDR;
375 panel.fb.format = FB_FORMAT_RGB888;
376 panel.mdp_rev = MDP_REV_50;
377
378 if (msm_display_init(&panel)) {
379 dprintf(CRITICAL, "edp init failed!\n");
380 return;
381 }
382
383 edp_enable = 1;
384 break;
385 default:
386 do {
387 target_force_cont_splash_disable(false);
388 ret = gcdb_display_init(panel_name, MDP_REV_50,
389 MIPI_FB_ADDR);
390 if (!ret || ret == ERR_NOT_SUPPORTED) {
391 break;
392 } else {
393 target_force_cont_splash_disable(true);
394 msm_display_off();
395 }
396 } while (++panel_loop <= oem_panel_max_auto_detect_panels());
397 break;
398 }
399}
400
401void target_display_shutdown(void)
402{
403 uint32_t hw_id = board_hardware_id();
404 switch (hw_id) {
405 case HW_PLATFORM_LIQUID:
406 if (edp_enable)
407 msm_display_off();
408 break;
409 default:
410 gcdb_display_shutdown();
411 break;
412 }
413}