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Deepa Dinamani645e9b12012-12-21 14:23:40 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <reg.h>
32#include <target.h>
33#include <platform.h>
Pavel Nedev16f49232013-04-29 16:15:36 +030034#include <dload_util.h>
Deepa Dinamani645e9b12012-12-21 14:23:40 -080035#include <uart_dm.h>
Channagoud Kadabi3c50c312013-05-02 17:16:03 -070036#include <mmc_sdhci.h>
Deepa Dinamani7e729772013-02-25 11:54:05 -080037#include <platform/gpio.h>
Deepa Dinamani645e9b12012-12-21 14:23:40 -080038#include <spmi.h>
39#include <board.h>
Deepa Dinamaniff2b9ce2013-02-25 11:01:00 -080040#include <smem.h>
41#include <baseband.h>
Deepa Dinamani7e729772013-02-25 11:54:05 -080042#include <dev/keys.h>
Deepa Dinamani058f1cd2013-02-25 10:53:01 -080043#include <pm8x41.h>
Deepa Dinamani6bb87d52013-02-26 14:37:36 -080044#include <crypto5_wrapper.h>
Amol Jadi85e19192013-02-28 22:45:04 -080045#include <hsusb.h>
Deepa Dinamani645e9b12012-12-21 14:23:40 -080046
Deepa Dinamani6bb87d52013-02-26 14:37:36 -080047extern bool target_use_signed_kernel(void);
Channagoud Kadabi3c50c312013-05-02 17:16:03 -070048static void set_sdc_power_ctrl(void);
Deepa Dinamani6bb87d52013-02-26 14:37:36 -080049
50#define PMIC_ARB_CHANNEL_NUM 0
51#define PMIC_ARB_OWNER_ID 0
52
53#define CRYPTO_ENGINE_INSTANCE 1
54#define CRYPTO_ENGINE_EE 1
55#define CRYPTO_ENGINE_FIFO_SIZE 64
56#define CRYPTO_ENGINE_READ_PIPE 3
57#define CRYPTO_ENGINE_WRITE_PIPE 2
Deepa Dinamanibbcf1ca2013-07-09 14:10:57 -070058#define CRYPTO_READ_PIPE_LOCK_GRP 0
59#define CRYPTO_WRITE_PIPE_LOCK_GRP 0
Deepa Dinamani6bb87d52013-02-26 14:37:36 -080060#define CRYPTO_ENGINE_CMD_ARRAY_SIZE 20
Deepa Dinamani645e9b12012-12-21 14:23:40 -080061
Deepa Dinamani7e729772013-02-25 11:54:05 -080062#define TLMM_VOL_UP_BTN_GPIO 106
63
Maria Yub8fd0822013-06-26 10:10:45 +080064enum target_subtype {
65 HW_PLATFORM_SUBTYPE_SKUAA = 1,
66 HW_PLATFORM_SUBTYPE_SKUF = 2,
67 HW_PLATFORM_SUBTYPE_SKUAB = 3,
68};
69
Channagoud Kadabi3c50c312013-05-02 17:16:03 -070070static uint32_t mmc_sdhci_base[] =
71 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE, MSM_SDC3_SDHCI_BASE };
72
73struct mmc_device *dev;
Deepa Dinamani645e9b12012-12-21 14:23:40 -080074
75void target_early_init(void)
76{
77#if WITH_DEBUG_UART
Deepa Dinamani0a6c48c2013-02-04 15:45:01 -080078 uart_dm_init(1, 0, BLSP1_UART2_BASE);
Deepa Dinamani645e9b12012-12-21 14:23:40 -080079#endif
80}
81
Deepa Dinamani7e729772013-02-25 11:54:05 -080082/* Return 1 if vol_up pressed */
83static int target_volume_up()
84{
85 uint8_t status = 0;
86
87 gpio_tlmm_config(TLMM_VOL_UP_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE);
88
aiquny933017c2013-03-02 12:48:52 -080089 thread_sleep(10);
90
Deepa Dinamani7e729772013-02-25 11:54:05 -080091 /* Get status of GPIO */
92 status = gpio_status(TLMM_VOL_UP_BTN_GPIO);
93
94 /* Active low signal. */
95 return !status;
96}
97
98/* Return 1 if vol_down pressed */
99uint32_t target_volume_down()
100{
101 /* Volume down button tied in with PMIC RESIN. */
102 return pm8x41_resin_status();
103}
104
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800105static void target_keystatus()
106{
Deepa Dinamani7e729772013-02-25 11:54:05 -0800107 keys_init();
108
109 if(target_volume_down())
110 keys_post_event(KEY_VOLUMEDOWN, 1);
111
112 if(target_volume_up())
113 keys_post_event(KEY_VOLUMEUP, 1);
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800114}
115
Deepa Dinamani6bb87d52013-02-26 14:37:36 -0800116/* Set up params for h/w CRYPTO_ENGINE. */
117void target_crypto_init_params()
118{
119 struct crypto_init_params ce_params;
120
121 /* Set up base addresses and instance. */
122 ce_params.crypto_instance = CRYPTO_ENGINE_INSTANCE;
123 ce_params.crypto_base = MSM_CE1_BASE;
124 ce_params.bam_base = MSM_CE1_BAM_BASE;
125
126 /* Set up BAM config. */
Deepa Dinamanibbcf1ca2013-07-09 14:10:57 -0700127 ce_params.bam_ee = CRYPTO_ENGINE_EE;
128 ce_params.pipes.read_pipe = CRYPTO_ENGINE_READ_PIPE;
129 ce_params.pipes.write_pipe = CRYPTO_ENGINE_WRITE_PIPE;
130 ce_params.pipes.read_pipe_grp = CRYPTO_READ_PIPE_LOCK_GRP;
131 ce_params.pipes.write_pipe_grp = CRYPTO_WRITE_PIPE_LOCK_GRP;
Deepa Dinamani6bb87d52013-02-26 14:37:36 -0800132
133 /* Assign buffer sizes. */
134 ce_params.num_ce = CRYPTO_ENGINE_CMD_ARRAY_SIZE;
135 ce_params.read_fifo_size = CRYPTO_ENGINE_FIFO_SIZE;
136 ce_params.write_fifo_size = CRYPTO_ENGINE_FIFO_SIZE;
137
138 crypto_init_params(&ce_params);
139}
140
Channagoud Kadabi3c50c312013-05-02 17:16:03 -0700141void target_sdc_init()
142{
143 struct mmc_config_data config;
144
145 /*
146 * Set drive strength & pull ctrl for emmc
147 */
148 set_sdc_power_ctrl();
149
150 /* Enable sdhci mode */
151 sdhci_mode_enable(1);
152
153 config.bus_width = DATA_BUS_WIDTH_8BIT;
154 config.max_clk_rate = MMC_CLK_200MHZ;
155
156 /* Trying Slot 1*/
157 config.slot = 1;
158 config.base = mmc_sdhci_base[config.slot - 1];
159 if (!(dev = mmc_init(&config)))
160 {
161 /* Trying Slot 2 next */
162 config.slot = 2;
163 config.base = mmc_sdhci_base[config.slot - 1];
164 if (!(dev = mmc_init(&config))) {
165 dprintf(CRITICAL, "mmc init failed!");
166 ASSERT(0);
167 }
168 }
169
170 /*
171 * MMC initialization is complete, read the partition table info
172 */
173 if (partition_read_table()) {
174 dprintf(CRITICAL, "Error reading the partition table info\n");
175 ASSERT(0);
176 }
177}
178
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800179void target_init(void)
180{
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800181 dprintf(INFO, "target_init()\n");
182
183 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
184
185 target_keystatus();
186
Ray Zhang743e5032013-05-25 23:25:39 +0800187 /* Display splash screen if enabled */
188#if DISPLAY_SPLASH_SCREEN
189 dprintf(SPEW, "Display Init: Start\n");
190 display_init();
191 dprintf(SPEW, "Display Init: Done\n");
192#endif
193
Channagoud Kadabi3c50c312013-05-02 17:16:03 -0700194 target_sdc_init();
Deepa Dinamani6bb87d52013-02-26 14:37:36 -0800195
196 if (target_use_signed_kernel())
197 target_crypto_init_params();
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800198}
199
Deepa Dinamani058f1cd2013-02-25 10:53:01 -0800200/* Do any target specific intialization needed before entering fastboot mode */
201void target_fastboot_init(void)
202{
203 /* Set the BOOT_DONE flag in PM8026 */
204 pm8x41_set_boot_done();
205}
206
Deepa Dinamaniff2b9ce2013-02-25 11:01:00 -0800207/* Detect the target type */
208void target_detect(struct board_data *board)
209{
Maria Yuca51ee22013-06-27 21:45:24 +0800210 /*
211 * already fill the board->target on board.c
212 */
Deepa Dinamaniff2b9ce2013-02-25 11:01:00 -0800213}
214
215/* Detect the modem type */
216void target_baseband_detect(struct board_data *board)
217{
218 uint32_t platform;
219 uint32_t platform_subtype;
220
221 platform = board->platform;
222 platform_subtype = board->platform_subtype;
223
224 /*
225 * Look for platform subtype if present, else
226 * check for platform type to decide on the
227 * baseband type
228 */
229 switch(platform_subtype)
230 {
231 case HW_PLATFORM_SUBTYPE_UNKNOWN:
232 break;
Maria Yub8fd0822013-06-26 10:10:45 +0800233 case HW_PLATFORM_SUBTYPE_SKUAA:
234 break;
235 case HW_PLATFORM_SUBTYPE_SKUF:
236 break;
237 case HW_PLATFORM_SUBTYPE_SKUAB:
238 break;
Deepa Dinamaniff2b9ce2013-02-25 11:01:00 -0800239 default:
240 dprintf(CRITICAL, "Platform Subtype : %u is not supported\n", platform_subtype);
241 ASSERT(0);
242 };
243
244 switch(platform)
245 {
246 case MSM8826:
247 case MSM8626:
248 case MSM8226:
Deepa Dinamani7eeecf62013-05-21 12:43:26 -0700249 case MSM8926:
250 case MSM8126:
251 case MSM8326:
Deepa Dinamaniff2b9ce2013-02-25 11:01:00 -0800252 board->baseband = BASEBAND_MSM;
253 break;
Deepa Dinamani7eeecf62013-05-21 12:43:26 -0700254 case APQ8026:
255 board->baseband = BASEBAND_APQ;
256 break;
Deepa Dinamaniff2b9ce2013-02-25 11:01:00 -0800257 default:
258 dprintf(CRITICAL, "Platform type: %u is not supported\n", platform);
259 ASSERT(0);
260 };
261}
262
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800263void target_serialno(unsigned char *buf)
264{
265 uint32_t serialno;
266 if (target_is_emmc_boot()) {
267 serialno = mmc_get_psn();
268 snprintf((char *)buf, 13, "%x", serialno);
269 }
270}
271
Deepa Dinamani8d2bb222013-02-26 14:03:04 -0800272unsigned check_reboot_mode(void)
273{
274 uint32_t restart_reason = 0;
275
276 /* Read reboot reason and scrub it */
277 restart_reason = readl(RESTART_REASON_ADDR);
278 writel(0x00, RESTART_REASON_ADDR);
279
280 return restart_reason;
281}
282
Deepa Dinamanif7c03c12013-02-26 14:17:20 -0800283void reboot_device(unsigned reboot_reason)
284{
285 writel(reboot_reason, RESTART_REASON_ADDR);
286
287 /* Configure PMIC for warm reset */
288 pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
289
290 /* Drop PS_HOLD for MSM */
291 writel(0x00, MPM2_MPM_PS_HOLD);
292
293 mdelay(5000);
294
295 dprintf(CRITICAL, "Rebooting failed\n");
296}
297
Deepa Dinamani6bb87d52013-02-26 14:37:36 -0800298crypto_engine_type board_ce_type(void)
299{
300 return CRYPTO_ENGINE_TYPE_HW;
301}
302
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800303unsigned board_machtype(void)
304{
Deepa Dinamani8d6b4252013-03-06 11:16:41 -0800305 return 0;
306}
307
308void target_usb_stop(void)
309{
310 /* Disable VBUS mimicing in the controller. */
311 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR);
Deepa Dinamani645e9b12012-12-21 14:23:40 -0800312}
Amol Jadi85e19192013-02-28 22:45:04 -0800313
Channagoud Kadabie3a695a2013-06-18 18:35:00 -0700314void target_uninit(void)
315{
316 mmc_put_card_to_sleep(dev);
317}
318
Amol Jadi85e19192013-02-28 22:45:04 -0800319void target_usb_init(void)
320{
321 uint32_t val;
322
323 /* Select and enable external configuration with USB PHY */
324 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET);
325
326 /* Enable sess_vld */
327 val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN;
328 writel(val, USB_GENCONFIG_2);
329
330 /* Enable external vbus configuration in the LINK */
331 val = readl(USB_USBCMD);
332 val |= SESS_VLD_CTRL;
333 writel(val, USB_USBCMD);
334}
Deepa Dinamanicde64572013-02-25 15:02:25 -0800335
Ray Zhang743e5032013-05-25 23:25:39 +0800336/* Returns 1 if target supports continuous splash screen. */
337int target_cont_splash_screen()
338{
339 switch(board_hardware_id())
340 {
341 case HW_PLATFORM_MTP:
342 case HW_PLATFORM_QRD:
343 case HW_PLATFORM_SURF:
344 dprintf(SPEW, "Target_cont_splash=1\n");
345 return 1;
346 break;
347 default:
348 dprintf(SPEW, "Target_cont_splash=0\n");
349 return 0;
350 }
351}
352
Deepa Dinamanicde64572013-02-25 15:02:25 -0800353unsigned target_pause_for_battery_charge(void)
354{
355 uint8_t pon_reason = pm8x41_get_pon_reason();
Ameya Thakur06041312013-06-25 13:46:21 -0700356 uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
Ameya Thakur531e59a2013-07-17 16:53:53 -0700357 dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
358 pon_reason, is_cold_boot);
Ameya Thakura8711dc2013-07-19 17:52:51 -0700359 /* In case of fastboot reboot,adb reboot or if we see the power key
360 * pressed we do not want go into charger mode.
Ameya Thakur531e59a2013-07-17 16:53:53 -0700361 * fastboot reboot is warm boot with PON hard reset bit not set
362 * adb reboot is a cold boot with PON hard reset bit set
363 */
Ameya Thakura8711dc2013-07-19 17:52:51 -0700364 if (is_cold_boot &&
365 (!(pon_reason & HARD_RST)) &&
366 (!(pon_reason & KPDPWR_N)) &&
Ameya Thakur531e59a2013-07-17 16:53:53 -0700367 ((pon_reason & USB_CHG) || (pon_reason & DC_CHG)))
368 return 1;
369 else
370 return 0;
Deepa Dinamanicde64572013-02-25 15:02:25 -0800371}
Channagoud Kadabida54ca12013-03-29 11:22:15 -0700372
373unsigned target_baseband()
374{
375 return board_baseband();
376}
Stanimir Varbanov7f9d7a72013-04-29 12:05:39 +0300377
378int emmc_recovery_init(void)
379{
Pavel Nedev16f49232013-04-29 16:15:36 +0300380 return _emmc_recovery_init();
381}
382
Pavel Nedeva4c9d3a2013-05-15 14:42:34 +0300383int set_download_mode(enum dload_mode mode)
Pavel Nedev16f49232013-04-29 16:15:36 +0300384{
Pavel Nedeva4c9d3a2013-05-15 14:42:34 +0300385 dload_util_write_cookie(mode == NORMAL_DLOAD ?
386 DLOAD_MODE_ADDR : EMERGENCY_DLOAD_MODE_ADDR, mode);
Pavel Nedev16f49232013-04-29 16:15:36 +0300387
388 return 0;
Stanimir Varbanov7f9d7a72013-04-29 12:05:39 +0300389}
Channagoud Kadabi3c50c312013-05-02 17:16:03 -0700390
391static void set_sdc_power_ctrl()
392{
393 /* Drive strength configs for sdc pins */
394 struct tlmm_cfgs sdc1_hdrv_cfg[] =
395 {
396 { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
397 { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
398 { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
399 };
400
401 /* Pull configs for sdc pins */
402 struct tlmm_cfgs sdc1_pull_cfg[] =
403 {
404 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK },
405 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
406 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
407 };
408
409 /* Set the drive strength & pull control values */
410 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
411 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
412}
413
414struct mmc_device *target_mmc_device()
415{
416 return dev;
417}