Shashank Mittal | 23b8f42 | 2010-04-16 19:27:21 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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| 2 |
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| 3 | * Redistribution and use in source and binary forms, with or without
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| 4 | * modification, are permitted provided that the following conditions are
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| 5 | * met:
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| 6 | * * Redistributions of source code must retain the above copyright
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| 7 | * notice, this list of conditions and the following disclaimer.
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| 8 | * * Redistributions in binary form must reproduce the above
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| 9 | * copyright notice, this list of conditions and the following
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| 10 | * disclaimer in the documentation and/or other materials provided
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| 11 | * with the distribution.
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| 12 | * * Neither the name of Code Aurora Forum, Inc. nor the names of its
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| 13 | * contributors may be used to endorse or promote products derived
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| 14 | * from this software without specific prior written permission.
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| 15 | *
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| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #include <string.h>
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| 30 | #include <stdlib.h>
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| 31 | #include <debug.h>
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| 32 | #include <reg.h>
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Shashank Mittal | 7afbf28 | 2010-06-02 19:48:31 -0700 | [diff] [blame] | 33 | #include "mmc.h"
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Shashank Mittal | 23b8f42 | 2010-04-16 19:27:21 -0700 | [diff] [blame] | 34 |
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| 35 | #define CLK_CTL_BASE 0x00900000
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| 36 |
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| 37 | #define SDC_NS(n) (CLK_CTL_BASE + 0x282C + 32*((n) - 1))
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| 38 | #define SDC1_NS SDC_NS(1)
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| 39 | #define SDC2_NS SDC_NS(2)
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| 40 | #define SDC3_NS SDC_NS(3)
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| 41 | #define SDC4_NS SDC_NS(4)
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| 42 | #define SDC5_NS SDC_NS(5)
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| 43 |
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| 44 | #define SDC_MD(n) (CLK_CTL_BASE + 0x2828 + 32*((n) - 1))
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| 45 | #define SDC1_MD SDC_MD(1)
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| 46 | #define SDC2_MD SDC_MD(2)
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| 47 | #define SDC3_MD SDC_MD(3)
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| 48 | #define SDC4_MD SDC_MD(4)
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| 49 | #define SDC5_MD SDC_MD(5)
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| 50 |
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| 51 | static void mmc_set_clk(unsigned ns, unsigned md)
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| 52 | {
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| 53 | unsigned int val;
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| 54 | /*Clock Init*/
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| 55 | // 1. Set bit 7 in the NS registers
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| 56 | val = 1 << 7;
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| 57 | writel(val, SDC1_NS);
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| 58 |
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| 59 | //2. Program MD registers
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| 60 | writel(md, SDC1_MD);
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| 61 |
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| 62 | //3. Program NS resgister OR'd with Bit 7
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| 63 | val = 1 << 7;
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| 64 | val |= ns;
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| 65 | writel(val, SDC1_NS);
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| 66 |
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| 67 | //4. Clear bit 7 of NS register
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| 68 | val = 1 << 7;
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| 69 | val = ~val;
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| 70 | val = val & readl(SDC1_NS);
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| 71 | writel(val, SDC1_NS);
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| 72 |
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| 73 | //5. For MD != NA set bit 8 of NS register
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| 74 | val = 1 << 8;
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| 75 | val = val | readl(SDC1_NS);
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| 76 | writel(val, SDC1_NS);
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| 77 |
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| 78 | //6. Set bit 11 in NS register
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| 79 | val = 1 << 11;
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| 80 | val = val | readl(SDC1_NS);
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| 81 | writel(val, SDC1_NS);
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| 82 |
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| 83 | //7. Set bit 9 in NS register
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| 84 | val = 1 << 9;
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| 85 | val = val | readl(SDC1_NS);
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| 86 | writel(val, SDC1_NS);
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| 87 | }
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| 88 |
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| 89 |
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| 90 | void clock_set_enable (unsigned int mclk)
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| 91 | {
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Amol Jadi | ca4f4c9 | 2011-01-13 20:19:34 -0800 | [diff] [blame^] | 92 |
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| 93 | #ifdef PLATFORM_MSM8960
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| 94 | return;
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| 95 | #endif
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| 96 |
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Shashank Mittal | 7afbf28 | 2010-06-02 19:48:31 -0700 | [diff] [blame] | 97 | if (mclk == MMC_CLK_400KHZ)
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Shashank Mittal | 23b8f42 | 2010-04-16 19:27:21 -0700 | [diff] [blame] | 98 | {
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| 99 | mmc_set_clk(0x0010005B, 0x0001000F);
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| 100 | }
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Shashank Mittal | 7afbf28 | 2010-06-02 19:48:31 -0700 | [diff] [blame] | 101 | else if (mclk == MMC_CLK_20MHZ)
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Shashank Mittal | 23b8f42 | 2010-04-16 19:27:21 -0700 | [diff] [blame] | 102 | {
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| 103 | mmc_set_clk(0x00ED0043, 0x000100EC);
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| 104 | }
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Shashank Mittal | 7afbf28 | 2010-06-02 19:48:31 -0700 | [diff] [blame] | 105 | else if (mclk == MMC_CLK_48MHZ)
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| 106 | {
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| 107 | mmc_set_clk(0x00FE005B, 0x000100FD);
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| 108 | }
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Shashank Mittal | 23b8f42 | 2010-04-16 19:27:21 -0700 | [diff] [blame] | 109 | }
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