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Padmanabhan Komanduru444feb72014-12-26 15:06:52 +05301/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
Dhaval Patel7ecee052013-10-21 10:23:31 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29#ifndef _TARGET_DISPLAY_H
30#define _TARGET_DISPLAY_H
31
32/*---------------------------------------------------------------------------*/
33/* HEADER files */
34/*---------------------------------------------------------------------------*/
35#include <display_resource.h>
36
37/*---------------------------------------------------------------------------*/
38/* GPIO configuration */
39/*---------------------------------------------------------------------------*/
40static struct gpio_pin reset_gpio = {
41 "msmgpio", 96, 3, 1, 0, 1
42};
43
44static struct gpio_pin enable_gpio = {
45 "msmgpio", 137, 3, 1, 0, 1
46};
47
48static struct gpio_pin bkl_gpio = {
49 "msmgpio", 86, 3, 1, 0, 1
50};
51
52static struct gpio_pin pwm_gpio = {
53 "pm8084", 7, 3, 1, 0, 1
54};
Kuogee Hsiehacc31942014-06-17 15:12:10 -070055
56static struct gpio_pin edp_lvl_en_gpio = {
57 "msmgpio", 91, 3, 1, 0, 1
58};
59
60static struct gpio_pin edp_hpd_gpio = { /* input */
61 "msmgpio", 103, 3, 0, 0, 1
62};
63
Ajay Singh Parmar7f31e0e2014-09-03 22:09:46 -070064/* gpio name, id, strength, direction, pull, state. */
65static struct gpio_pin hdmi_cec_gpio = { /* CEC */
66 "msmgpio", 31, 0, 2, 3, 1
67};
68
69static struct gpio_pin hdmi_ddc_clk_gpio = { /* DDC CLK */
70 "msmgpio", 32, 0, 2, 3, 1
71};
72
73static struct gpio_pin hdmi_ddc_data_gpio = { /* DDC DATA */
74 "msmgpio", 33, 0, 2, 3, 1
75};
76
77static struct gpio_pin hdmi_hpd_gpio = { /* HPD, input */
78 "msmgpio", 34, 7, 0, 1, 1
79};
80
81static struct gpio_pin hdmi_mux_lpm_gpio = { /* MUX LPM */
82 "msmgpio", 27, 0, 2, 0, 0
83};
84
85static struct gpio_pin hdmi_mux_en_gpio = { /* MUX EN */
86 "msmgpio", 83, 3, 2, 3, 1
87};
88
89static struct gpio_pin hdmi_mux_sel_gpio = { /* MUX SEL */
90 "msmgpio", 85, 0, 0, 1, 1
91};
92
Dhaval Patel7ecee052013-10-21 10:23:31 -070093/*---------------------------------------------------------------------------*/
94/* LDO configuration */
95/*---------------------------------------------------------------------------*/
96static struct ldo_entry ldo_entry_array[] = {
97 { "vdd", 22, 0, 3000000, 100000, 100, 0, 20, 0, 0},
98 { "vddio", 12, 0, 1800000, 100000, 100, 0, 20, 0, 0},
99 { "vdda", 2, 1, 1200000, 100000, 100, 0, 0, 0, 0},
100};
101
102#define TOTAL_LDO_DEFINED 3
103
104/*---------------------------------------------------------------------------*/
105/* Target Physical configuration */
106/*---------------------------------------------------------------------------*/
107
108static const uint32_t panel_strength_ctrl[] = {
109 0xff, 0x06
110};
111
112static const char panel_bist_ctrl[] = {
113 0x00, 0x00, 0xb1, 0xff, 0x00, 0x00
114};
115
116static const uint32_t panel_regulator_settings[] = {
Padmanabhan Komandurub088f922014-10-28 23:55:20 +0530117 0x03, 0x09, 0x03, 0x00, 0x20, 0x07, 0x01
Dhaval Patel7ecee052013-10-21 10:23:31 -0700118};
119
120static const char panel_lane_config[] = {
121 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
Padmanabhan Komanduru444feb72014-12-26 15:06:52 +0530122 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
124 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
Dhaval Patel7ecee052013-10-21 10:23:31 -0700125 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xbb
126};
127
128static const uint32_t panel_physical_ctrl[] = {
129 0x5f, 0x00, 0x00, 0x10
130};
131
132/*---------------------------------------------------------------------------*/
133/* Other Configuration */
134/*---------------------------------------------------------------------------*/
Dhaval Patel252d6722013-10-10 17:37:16 -0700135#define DISPLAY_CMDLINE_PREFIX " mdss_mdp.panel="
136
Dhaval Patel7ecee052013-10-21 10:23:31 -0700137#define MIPI_FB_ADDR 0x03200000
Ajay Singh Parmar9ba3c162014-08-28 14:39:08 -0700138#define HDMI_FB_ADDR 0x05200000
Dhaval Patel7ecee052013-10-21 10:23:31 -0700139
140#define MIPI_HSYNC_PULSE_WIDTH 12
141#define MIPI_HSYNC_BACK_PORCH_DCLK 32
142#define MIPI_HSYNC_FRONT_PORCH_DCLK 144
143
144#define MIPI_VSYNC_PULSE_WIDTH 4
145#define MIPI_VSYNC_BACK_PORCH_LINES 3
146#define MIPI_VSYNC_FRONT_PORCH_LINES 9
147
Dhaval Patel499b7d22014-01-07 21:57:30 -0800148#define PWM_BL_LPG_CHAN_ID 3
149
Ajay Singh Parmareef1d602014-03-15 17:41:52 -0700150#define HDMI_PANEL_NAME "hdmi"
151#define HDMI_CONTROLLER_STRING "hdmi:0"
152
Dhaval Patel7ecee052013-10-21 10:23:31 -0700153#endif