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Greg Griscod2471ef2011-07-14 13:00:42 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
Ajay Dudani8534b1a2011-01-26 11:35:39 -08002
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <reg.h>
30#include <platform/clock.h>
31#include <platform/scm-io.h>
Subbaraman Narayanamurthy346bdcb2011-02-24 12:02:58 -080032#include <platform/iomap.h>
Ajay Dudani8534b1a2011-01-26 11:35:39 -080033
Ajay Dudani012f8f12011-01-26 11:49:47 -080034#pragma GCC optimize ("O0")
35
Ajay Dudani8534b1a2011-01-26 11:35:39 -080036#define SCM_IO_READ ((((0x5 << 10) | 0x1) << 12) | (0x2 << 8) | 0x1)
37#define SCM_IO_WRITE ((((0x5 << 10) | 0x2) << 12) | (0x2 << 8) | 0x2)
38
39#define BETWEEN(p, st, sz) ((p) >= (void *)(st) && \
40 (p) < ((void *)(st) + (sz)))
41
Greg Griscod2471ef2011-07-14 13:00:42 -070042extern void dmb(void);
43
Ajay Dudani8534b1a2011-01-26 11:35:39 -080044uint32_t secure_readl(uint32_t c)
45{
Greg Griscod2471ef2011-07-14 13:00:42 -070046 if ((BETWEEN((void *) c, MSM_MMSS_CLK_CTL_BASE, MSM_MMSS_CLK_CTL_SIZE)) ||
47 (BETWEEN((void *) c, MSM_TCSR_BASE, MSM_TCSR_SIZE)))
Ajay Dudani8534b1a2011-01-26 11:35:39 -080048 {
49 uint32_t context_id;
50 register uint32_t r0 __asm__("r0") = SCM_IO_READ;
51 register uint32_t r1 __asm__("r1") = (uint32_t)&context_id;
52 register uint32_t r2 __asm__("r2") = c;
53
54 __asm__(
55 "smc #0 @ switch to secure world\n"
56 : "=r" (r0)
57 : "r" (r0), "r" (r1), "r" (r2)
58 );
59 dmb();
60 return r0;
61 }
62 return readl(c);
63}
64
65void secure_writel(uint32_t v, uint32_t c)
66{
Greg Griscod2471ef2011-07-14 13:00:42 -070067 if ((BETWEEN((void *) c, MSM_MMSS_CLK_CTL_BASE, MSM_MMSS_CLK_CTL_SIZE)) ||
68 (BETWEEN((void *) c, MSM_TCSR_BASE, MSM_TCSR_SIZE))) {
Ajay Dudani8534b1a2011-01-26 11:35:39 -080069 uint32_t context_id;
70 register uint32_t r0 __asm__("r0") = SCM_IO_WRITE;
71 register uint32_t r1 __asm__("r1") = (uint32_t)&context_id;
72 register uint32_t r2 __asm__("r2") = c;
73 register uint32_t r3 __asm__("r3") = v;
74 dmb();
75 __asm__(
76 "smc #0 @ switch to secure world\n"
77 : /* No return value */
78 : "r" (r0), "r" (r1), "r" (r2), "r" (r3)
79 );
80 } else
81 writel(v, c);
82}