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Jayant Shekhar32397f92014-03-27 13:30:41 +05301/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
Shashank Mittal4bfb2e32012-04-16 10:56:27 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
Siddhartha Agrawal3e694ea2013-01-23 17:01:31 -080012 * * Neither the name of The Linux Foundation nor the names of its
Shashank Mittal4bfb2e32012-04-16 10:56:27 -070013 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#ifndef _PLATFORM_MSM_SHARED_MSM_PANEL_H_
31#define _PLATFORM_MSM_SHARED_MSM_PANEL_H_
32
33#include <stdint.h>
34#include <dev/fbcon.h>
35
36#define TRUE 1
37#define FALSE 0
38
39/* panel type list */
40#define NO_PANEL 0xffff /* No Panel */
41#define MDDI_PANEL 1 /* MDDI */
42#define EBI2_PANEL 2 /* EBI2 */
43#define LCDC_PANEL 3 /* internal LCDC type */
44#define EXT_MDDI_PANEL 4 /* Ext.MDDI */
45#define TV_PANEL 5 /* TV */
46#define HDMI_PANEL 6 /* HDMI TV */
47#define DTV_PANEL 7 /* DTV */
48#define MIPI_VIDEO_PANEL 8 /* MIPI */
49#define MIPI_CMD_PANEL 9 /* MIPI */
50#define WRITEBACK_PANEL 10 /* Wifi display */
51#define LVDS_PANEL 11 /* LVDS */
Asaf Pensob8f524c2013-05-20 12:32:31 +030052#define EDP_PANEL 12 /* EDP */
Zohaib Alamb7b677f2014-10-24 15:54:42 -040053#define QPIC_PANEL 13 /* QPIC */
Shashank Mittal4bfb2e32012-04-16 10:56:27 -070054
Aravind Venkateswaranfec354c2014-12-04 18:10:14 -080055#define DISPLAY_UNKNOWN 0
56#define DISPLAY_1 1
57#define DISPLAY_2 2
58
Jayant Shekhar03e1a222014-05-22 11:03:53 +053059enum mdss_mdp_pipe_type {
60 MDSS_MDP_PIPE_TYPE_VIG,
61 MDSS_MDP_PIPE_TYPE_RGB,
62 MDSS_MDP_PIPE_TYPE_DMA,
63};
64
Shashank Mittal4bfb2e32012-04-16 10:56:27 -070065enum msm_mdp_hw_revision {
66 MDP_REV_20 = 1,
67 MDP_REV_22,
68 MDP_REV_30,
69 MDP_REV_303,
Terence Hampsonf49ff4e2013-06-18 15:11:31 -040070 MDP_REV_304,
Shivaraj Shettyf9e10c42014-09-17 04:21:15 +053071 MDP_REV_305,
Shashank Mittal4bfb2e32012-04-16 10:56:27 -070072 MDP_REV_31,
73 MDP_REV_40,
74 MDP_REV_41,
75 MDP_REV_42,
76 MDP_REV_43,
77 MDP_REV_44,
Siddhartha Agrawal7e2e2152013-01-23 17:06:58 -080078 MDP_REV_50,
Shashank Mittal4bfb2e32012-04-16 10:56:27 -070079};
80
81/* panel info type */
82struct lcd_panel_info {
83 uint32_t vsync_enable;
84 uint32_t refx100;
85 uint32_t v_back_porch;
86 uint32_t v_front_porch;
87 uint32_t v_pulse_width;
88 uint32_t hw_vsync_mode;
89 uint32_t vsync_notifier_period;
90 uint32_t rev;
91};
92
Ajay Singh Parmar7c1cd522013-02-13 20:33:49 +053093struct hdmi_panel_info {
94 uint32_t h_back_porch;
95 uint32_t h_front_porch;
96 uint32_t h_pulse_width;
97 uint32_t v_back_porch;
98 uint32_t v_front_porch;
99 uint32_t v_pulse_width;
100};
101
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700102struct lcdc_panel_info {
103 uint32_t h_back_porch;
104 uint32_t h_front_porch;
105 uint32_t h_pulse_width;
106 uint32_t v_back_porch;
107 uint32_t v_front_porch;
108 uint32_t v_pulse_width;
109 uint32_t border_clr;
110 uint32_t underflow_clr;
111 uint32_t hsync_skew;
112 /* Pad width */
113 uint32_t xres_pad;
114 /* Pad height */
115 uint32_t yres_pad;
Siddhartha Agrawal547ce4a2013-05-23 14:10:43 -0700116 uint8_t dual_pipe;
Kuogee Hsiehad69c3c2013-08-01 14:34:29 -0700117 uint8_t split_display;
Siddhartha Agrawal6ef1e222013-06-12 18:24:58 -0700118 uint8_t pipe_swap;
Vineet Bajaj4effb132014-07-24 16:55:41 +0530119 uint8_t dst_split;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700120};
121
Siddhartha Agrawalfe64dcb2014-10-07 12:41:01 -0700122struct fbc_panel_info {
123 uint32_t enabled;
124 uint32_t comp_ratio;
125 uint32_t comp_mode;
126 uint32_t qerr_enable;
127 uint32_t cd_bias;
128 uint32_t pat_enable;
129 uint32_t vlc_enable;
130 uint32_t bflc_enable;
131
132 uint32_t line_x_budget;
133 uint32_t block_x_budget;
134 uint32_t block_budget;
135
136 uint32_t lossless_mode_thd;
137 uint32_t lossy_mode_thd;
138 uint32_t lossy_rgb_thd;
139 uint32_t lossy_mode_idx;
Jeevan Shriram1b07e372014-11-30 22:03:50 -0800140
141 uint32_t slice_height;
142 uint32_t pred_mode;
143 uint32_t max_pred_err;
Siddhartha Agrawalfe64dcb2014-10-07 12:41:01 -0700144};
145
146/* intf timing settings */
147struct intf_timing_params {
148 uint32_t width;
149 uint32_t height;
150 uint32_t xres;
151 uint32_t yres;
152
153 uint32_t h_back_porch;
154 uint32_t h_front_porch;
155 uint32_t v_back_porch;
156 uint32_t v_front_porch;
157 uint32_t hsync_pulse_width;
158 uint32_t vsync_pulse_width;
159
160 uint32_t border_clr;
161 uint32_t underflow_clr;
162 uint32_t hsync_skew;
163};
164
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700165struct mipi_panel_info {
Siddhartha Agrawal007ea9e2014-10-14 15:02:48 -0700166 char cmds_post_tg; /* send on commands after tg on */
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700167 char mode; /* video/cmd */
168 char interleave_mode;
Arpita Banerjeef1a8ac92013-05-21 10:09:35 -0700169 int eof_bllp_power;
Arpita Banerjee2522bc62013-05-24 16:03:53 -0700170 uint32_t bitclock;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700171 char crc_check;
172 char ecc_check;
173 char dst_format; /* shared by video and command */
174 char num_of_lanes;
175 char data_lane0;
176 char data_lane1;
177 char data_lane2;
178 char data_lane3;
179 char dlane_swap; /* data lane swap */
180 char rgb_swap;
181 char b_sel;
182 char g_sel;
183 char r_sel;
184 char rx_eot_ignore;
185 char tx_eot_append;
186 char t_clk_post; /* 0xc0, DSI_CLKOUT_TIMING_CTRL */
187 char t_clk_pre; /* 0xc0, DSI_CLKOUT_TIMING_CTRL */
188 char vc; /* virtual channel */
189 struct mipi_dsi_phy_ctrl *dsi_phy_db;
Siddhartha Agrawal3e694ea2013-01-23 17:01:31 -0800190 struct mdss_dsi_phy_ctrl *mdss_dsi_phy_db;
Arpita Banerjee2522bc62013-05-24 16:03:53 -0700191 struct mdss_dsi_pll_config *dsi_pll_config;
Padmanabhan Komandurub3d31842014-11-04 15:47:53 +0530192 struct mipi_dsi_cmd *panel_on_cmds;
193 int num_of_panel_on_cmds;
194 struct mipi_dsi_cmd *panel_off_cmds;
195 int num_of_panel_off_cmds;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700196 /* video mode */
197 char pulse_mode_hsa_he;
198 char hfp_power_stop;
199 char hbp_power_stop;
200 char hsa_power_stop;
201 char eof_bllp_power_stop;
202 char bllp_power_stop;
203 char traffic_mode;
204 char frame_rate;
205 /* command mode */
206 char interleave_max;
207 char insert_dcs_cmd;
208 char wr_mem_continue;
209 char wr_mem_start;
210 char te_sel;
211 char stream; /* 0 or 1 */
212 char mdp_trigger;
213 char dma_trigger;
214 uint32_t dsi_pclk_rate;
215 /* The packet-size should not bet changed */
216 char no_max_pkt_size;
217 /* Clock required during LP commands */
218 char force_clk_lane_hs;
Channagoud Kadabi539ef722012-03-29 16:02:50 +0530219 char lane_swap;
Siddhartha Agrawal547ce4a2013-05-23 14:10:43 -0700220 uint8_t dual_dsi;
221 uint8_t broadcast;
Dhaval Patel940e09c2013-08-08 20:47:05 -0700222 uint8_t mode_gpio_state;
Casey Piper84036752013-09-05 14:56:37 -0700223 uint32_t signature;
Aravind Venkateswaran27338a92013-11-04 17:27:05 -0800224 uint32_t use_enable_gpio;
Aravind Venkateswaranfec354c2014-12-04 18:10:14 -0800225 uint32_t ctl_base;
226 uint32_t phy_base;
227 uint32_t sctl_base;
228 uint32_t sphy_base;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700229};
230
Kuogee Hsiehad69c3c2013-08-01 14:34:29 -0700231struct edp_panel_info {
232 int max_lane_count;
233 unsigned long max_link_clk;
234};
235
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700236enum lvds_mode {
237 LVDS_SINGLE_CHANNEL_MODE,
238 LVDS_DUAL_CHANNEL_MODE,
239};
240
241struct lvds_panel_info {
242 enum lvds_mode channel_mode;
243 /* Channel swap in dual mode */
244 char channel_swap;
245};
246
Kuogee Hsieh9747d9e2014-12-05 15:42:11 -0800247struct labibb_desc {
248 char amoled_panel; /* lcd = 0, amoled = 1*/
249 char force_config; /* 0 to use default value */
250 uint32_t ibb_min_volt;
251 uint32_t ibb_max_volt;
252 uint32_t lab_min_volt;
253 uint32_t lab_max_volt;
254 char pwr_up_delay; /* ndx to => 1250, 2500, 5000 and 10000 us */
255 char pwr_down_delay; /* ndx to => 1250, 2500, 5000 and 10000 us */
256 char ibb_discharge_en;
257};
258
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700259struct msm_panel_info {
260 uint32_t xres;
261 uint32_t yres;
262 uint32_t bpp;
263 uint32_t type;
264 uint32_t wait_cycle;
265 uint32_t clk_rate;
Prashant Nukala64eeff92014-07-11 07:35:34 +0530266 uint32_t orientation;
Aravind Venkateswaranfec354c2014-12-04 18:10:14 -0800267 uint32_t dest;
Jayant Shekhar03e1a222014-05-22 11:03:53 +0530268 /* Select pipe type for handoff */
269 uint32_t pipe_type;
Arpita Banerjeef1a8ac92013-05-21 10:09:35 -0700270 char lowpowerstop;
Kuogee Hsieh208736d2014-08-22 14:16:55 -0700271 char lcd_reg_en;
Kuogee Hsieh31b4ff92014-10-22 14:55:42 -0700272 uint32_t border_top;
273 uint32_t border_bottom;
274 uint32_t border_left;
275 uint32_t border_right;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700276
277 struct lcd_panel_info lcd;
278 struct lcdc_panel_info lcdc;
Siddhartha Agrawalfe64dcb2014-10-07 12:41:01 -0700279 struct fbc_panel_info fbc;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700280 struct mipi_panel_info mipi;
281 struct lvds_panel_info lvds;
Ajay Singh Parmar7c1cd522013-02-13 20:33:49 +0530282 struct hdmi_panel_info hdmi;
Kuogee Hsiehad69c3c2013-08-01 14:34:29 -0700283 struct edp_panel_info edp;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700284
Kuogee Hsieh9747d9e2014-12-05 15:42:11 -0800285 struct labibb_desc *labibb;
286
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700287 int (*on) (void);
288 int (*off) (void);
Dhaval Patelaa081d32013-10-25 13:47:46 -0700289 int (*pre_on) (void);
290 int (*pre_off) (void);
Kuogee Hsiehad69c3c2013-08-01 14:34:29 -0700291 int (*prepare) (void);
Amir Samuelov2d4ba162012-07-22 11:53:14 +0300292 int (*early_config) (void *pdata);
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700293 int (*config) (void *pdata);
Channagoud Kadabi01c91822012-06-06 15:53:30 +0530294 int (*rotate) (void);
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700295};
296
297struct msm_fb_panel_data {
298 struct msm_panel_info panel_info;
299 struct fbcon_config fb;
300 int mdp_rev;
Channagoud Kadabi01c91822012-06-06 15:53:30 +0530301 int rotate;
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700302
303 /* function entry chain */
Veera Sundaram Sankarandb0b2bf2014-12-16 18:09:27 -0800304 int (*power_func) (uint8_t enable, struct msm_panel_info *);
305 uint32_t (*clk_func) (uint8_t enable, struct msm_panel_info *pinfo);
306 int (*bl_func) (uint8_t enable);
307 uint32_t (*pll_clk_func) (uint8_t enable, struct msm_panel_info *);
Jayant Shekhare2e6b712013-11-20 16:54:20 +0530308 int (*post_power_func)(int enable);
Ray Zhang4c7e37f2013-12-03 17:04:55 +0800309 int (*pre_init_func)(void);
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700310};
311
Shashank Mittal4bfb2e32012-04-16 10:56:27 -0700312#endif