Amol Jadi | db1edb3 | 2011-07-18 14:24:46 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are |
| 6 | * met: |
| 7 | * * Redistributions of source code must retain the above copyright |
| 8 | * notice, this list of conditions and the following disclaimer. |
| 9 | * * Redistributions in binary form must reproduce the above |
| 10 | * copyright notice, this list of conditions and the following |
| 11 | * disclaimer in the documentation and/or other materials provided |
| 12 | * with the distribution. |
| 13 | * * Neither the name of Code Aurora Forum, Inc. nor the names of its |
| 14 | * contributors may be used to endorse or promote products derived |
| 15 | * from this software without specific prior written permission. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 21 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 22 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 23 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 24 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 25 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 26 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 27 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 28 | */ |
| 29 | |
| 30 | #ifndef __PLATFORM_MSM_SHARED_QGIC_H |
| 31 | #define __PLATFORM_MSM_SHARED_QGIC_H |
| 32 | |
| 33 | #include <platform/iomap.h> |
| 34 | #include <platform/interrupts.h> |
| 35 | |
| 36 | #define GIC_CPU_REG(off) (MSM_GIC_CPU_BASE + (off)) |
| 37 | #define GIC_DIST_REG(off) (MSM_GIC_DIST_BASE + (off)) |
| 38 | |
| 39 | #define GIC_CPU_CTRL GIC_CPU_REG(0x00) |
| 40 | #define GIC_CPU_PRIMASK GIC_CPU_REG(0x04) |
| 41 | #define GIC_CPU_BINPOINT GIC_CPU_REG(0x08) |
| 42 | #define GIC_CPU_INTACK GIC_CPU_REG(0x0c) |
| 43 | #define GIC_CPU_EOI GIC_CPU_REG(0x10) |
| 44 | #define GIC_CPU_RUNNINGPRI GIC_CPU_REG(0x14) |
| 45 | #define GIC_CPU_HIGHPRI GIC_CPU_REG(0x18) |
| 46 | |
| 47 | #define GIC_DIST_CTRL GIC_DIST_REG(0x000) |
| 48 | #define GIC_DIST_CTR GIC_DIST_REG(0x004) |
| 49 | #define GIC_DIST_ENABLE_SET GIC_DIST_REG(0x100) |
| 50 | #define GIC_DIST_ENABLE_CLEAR GIC_DIST_REG(0x180) |
| 51 | #define GIC_DIST_PENDING_SET GIC_DIST_REG(0x200) |
| 52 | #define GIC_DIST_PENDING_CLEAR GIC_DIST_REG(0x280) |
| 53 | #define GIC_DIST_ACTIVE_BIT GIC_DIST_REG(0x300) |
| 54 | #define GIC_DIST_PRI GIC_DIST_REG(0x400) |
| 55 | #define GIC_DIST_TARGET GIC_DIST_REG(0x800) |
| 56 | #define GIC_DIST_CONFIG GIC_DIST_REG(0xc00) |
| 57 | #define GIC_DIST_SOFTINT GIC_DIST_REG(0xf00) |
| 58 | |
| 59 | struct ihandler { |
| 60 | int_handler func; |
| 61 | void *arg; |
| 62 | }; |
| 63 | |
| 64 | void qgic_init(void); |
| 65 | |
| 66 | #endif |