blob: 950049bdc2d5423a7d12d486bfb17a05acc1c845 [file] [log] [blame]
Joonwoo Park451dca32014-04-02 11:47:03 -07001/*
2 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution.
11 * * Neither the name of Linux Foundation nor
12 * the names of its contributors may be used to endorse or promote
13 * products derived from this software without specific prior written
14 * permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <err.h>
30#include <assert.h>
31#include <debug.h>
32#include <reg.h>
33#include <clock.h>
34#include <mmc.h>
35#include <platform/clock.h>
36#include <platform/iomap.h>
37#include <platform/timer.h>
38
39void clock_config_uart_dm(uint8_t id)
40{
41 int ret;
42 char clk_name[64];
43
44 snprintf(clk_name, sizeof(clk_name), "uart%u_iface_clk", id);
45 ret = clk_get_set_enable(clk_name, 0, 1);
46 if (ret)
47 {
48 dprintf(CRITICAL, "failed to set %s ret = %d\n", clk_name, ret);
49 ASSERT(0);
50 }
51
52 snprintf(clk_name, sizeof(clk_name), "uart%u_core_clk", id);
53 ret = clk_get_set_enable(clk_name, 7372800, 1);
54 if (ret)
55 {
56 dprintf(CRITICAL, "failed to set %s ret = %d\n", clk_name, ret);
57 ASSERT(0);
58 }
59}
60
61/*
62 * Disable power collapse using GDSCR:
63 * Globally Distributed Switch Controller Register
64 */
65void clock_usb30_gdsc_enable(void)
66{
67 uint32_t reg = readl(GCC_USB30_GDSCR);
68
69 reg &= ~(0x1);
70
71 writel(reg, GCC_USB30_GDSCR);
72}
73
74/* enables usb30 clocks */
75void clock_usb30_init(void)
76{
77 int ret;
78
79 ret = clk_get_set_enable("usb30_iface_clk", 0, 1);
80 if(ret)
81 {
82 dprintf(CRITICAL, "failed to set usb30_iface_clk. ret = %d\n", ret);
83 ASSERT(0);
84 }
85
86 clock_usb30_gdsc_enable();
87
88 ret = clk_get_set_enable("usb30_master_clk", 125000000, 1);
89 if(ret)
90 {
91 dprintf(CRITICAL, "failed to set usb30_master_clk. ret = %d\n", ret);
92 ASSERT(0);
93 }
94
95 ret = clk_get_set_enable("usb30_pipe_clk", 19200000, 1);
96 if(ret)
97 {
98 dprintf(CRITICAL, "failed to set usb30_pipe_clk. ret = %d\n", ret);
99 ASSERT(0);
100 }
101
102 ret = clk_get_set_enable("usb30_aux_clk", 1000000, 1);
103 if(ret)
104 {
105 dprintf(CRITICAL, "failed to set usb30_aux_clk. ret = %d\n", ret);
106 ASSERT(0);
107 }
108
109 ret = clk_get_set_enable("usb_phy_cfg_ahb_clk", 0, 1);
110 if(ret)
111 {
112 dprintf(CRITICAL, "failed to set usb_phy_cfg_ahb_clk ret = %d\n", ret);
113 ASSERT(0);
114 }
115}
116
117void clock_init_mmc(uint32_t interface)
118{
119 char clk_name[64];
120 int ret;
121
122 snprintf(clk_name, sizeof(clk_name), "sdc%u_iface_clk", interface);
123
124 /* enable interface clock */
125 ret = clk_get_set_enable(clk_name, 0, 1);
126 if(ret)
127 {
128 dprintf(CRITICAL, "failed to set sdc1_iface_clk ret = %d\n", ret);
129 ASSERT(0);
130 }
131}
132
133/* Configure MMC clock */
134void clock_config_mmc(uint32_t interface, uint32_t freq)
135{
136 int ret;
137 uint32_t reg;
138 char clk_name[64];
139
140 snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk", interface);
141
142 if(freq == MMC_CLK_400KHZ)
143 {
144 ret = clk_get_set_enable(clk_name, 400000, 1);
145 }
146 else if(freq == MMC_CLK_50MHZ)
147 {
148 ret = clk_get_set_enable(clk_name, 50000000, 1);
149 }
150 else if(freq == MMC_CLK_200MHZ)
151 {
152 ret = clk_get_set_enable(clk_name, 200000000, 1);
153 }
154 else if(freq == MMC_CLK_177MHZ)
155 {
156 ret = clk_get_set_enable(clk_name, 177770000, 1);
157 }
158 else
159 {
160 dprintf(CRITICAL, "sdc frequency (%u) is not supported\n", freq);
161 ASSERT(0);
162 }
163
164 if(ret)
165 {
166 dprintf(CRITICAL, "failed to set %s ret = %d\n", clk_name, ret);
167 ASSERT(0);
168 }
169}
170
171void clock_bumpup_pipe3_clk()
172{
173 int ret = 0;
174
175 ret = clk_get_set_enable("usb30_pipe_clk", 125000000, 0);
176 if(ret)
177 {
178 dprintf(CRITICAL, "failed to set usb30_pipe_clk. ret = %d\n", ret);
179 ASSERT(0);
180 }
181}