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Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#include <stdint.h>
31#include <msm_panel.h>
32#include <mipi_dsi.h>
33#include <sys/types.h>
Siddhartha Agrawal6e760042013-05-30 21:10:18 -070034#include <platform/iomap.h>
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -080035#include <err.h>
36#include <reg.h>
37#include <mdp4.h>
38
39int mipi_toshiba_video_720p_config(void *pdata)
40{
41 int ret = NO_ERROR;
42
43 /* 3 Lanes -- Enables Data Lane0, 1, 2 */
44 uint8_t lane_en = 0xf;
45 uint64_t low_pwr_stop_mode = 0;
46
Chandan Uddarajuc1497f12013-04-23 14:24:40 -070047 /* Needed or else will have blank line at top of display
48 Enable LP during EOF to send DCS commands during blanking */
49 uint8_t eof_bllp_pwr = 0x9;
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -080050
51 uint8_t interleav = 0;
52 struct lcdc_panel_info *lcdc = NULL;
53 struct msm_panel_info *pinfo = (struct msm_panel_info *)pdata;
54
55 if (pinfo == NULL)
56 return ERR_INVALID_ARGS;
57
58 lcdc = &(pinfo->lcdc);
59 if (lcdc == NULL)
60 return ERR_INVALID_ARGS;
61
Siddhartha Agrawal06bb82f2013-05-24 12:32:33 -070062 ret = mdss_dsi_video_mode_config((pinfo->xres + lcdc->xres_pad),
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -080063 (pinfo->yres + lcdc->yres_pad),
64 (pinfo->xres),
65 (pinfo->yres),
66 (lcdc->h_front_porch),
67 (lcdc->h_back_porch + lcdc->h_pulse_width),
68 (lcdc->v_front_porch),
69 (lcdc->v_back_porch + lcdc->v_pulse_width),
70 (lcdc->h_pulse_width),
71 (lcdc->v_pulse_width),
72 pinfo->mipi.dst_format,
73 pinfo->mipi.traffic_mode,
74 lane_en,
75 low_pwr_stop_mode,
76 eof_bllp_pwr,
Siddhartha Agrawal6e760042013-05-30 21:10:18 -070077 interleav,
78 MIPI_DSI0_BASE);
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -080079 return ret;
80}
81
82int mipi_toshiba_video_720p_on()
83{
84 int ret = NO_ERROR;
85 return ret;
86}
87
88int mipi_toshiba_video_720p_off()
89{
90 int ret = NO_ERROR;
91 return ret;
92}
93
94static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
95 /* 720x1280, RGB888, 4 Lane 60 fps video mode */
96 /* regulator */
Chandan Uddarajuaef2f6a2013-03-13 14:47:44 -070097 {0x07, 0x09, 0x03, 0x00, 0x20, 0x00, 0x01},
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -080098 /* timing */
Chandan Uddarajuaef2f6a2013-03-13 14:47:44 -070099 {0xb0, 0x23, 0x1b, 0x00, 0x94, 0x93, 0x1e, 0x25,
100 0x15, 0x03, 0x04, 0x00},
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -0800101 /* phy ctrl */
102 {0x5f, 0x00, 0x00, 0x10},
103 /* strength */
Chandan Uddarajuaef2f6a2013-03-13 14:47:44 -0700104 {0xff, 0x06},
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -0800105 /* bist control */
106 {0x00, 0x00, 0xb1, 0xff, 0x00, 0x00},
107 /* lanes config */
Chandan Uddarajuaef2f6a2013-03-13 14:47:44 -0700108 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x97,
109 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x01, 0x97,
110 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x00, 0x01, 0x97,
111 0x00, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x01, 0x97,
112 0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xbb},
Siddhartha Agrawal6c3f6f32013-01-22 17:56:36 -0800113};
114
115void mipi_toshiba_video_720p_init(struct msm_panel_info *pinfo)
116{
117 if (!pinfo)
118 return;
119
120 pinfo->xres = 720;
121 pinfo->yres = 1280;
122 /*
123 *
124 * Panel's Horizontal input timing requirement is to
125 * include dummy(pad) data of 200 clk in addition to
126 * width and porch/sync width values
127 */
128
129 pinfo->type = MIPI_VIDEO_PANEL;
130 pinfo->wait_cycle = 0;
131 pinfo->bpp = 24;
132 pinfo->lcdc.h_back_porch = 32;
133 pinfo->lcdc.h_front_porch = 144;
134 pinfo->lcdc.h_pulse_width = 12;
135 pinfo->lcdc.v_back_porch = 3;
136 pinfo->lcdc.v_front_porch = 9;
137 pinfo->lcdc.v_pulse_width = 4;
138 pinfo->lcdc.border_clr = 0; /* blk */
139 pinfo->lcdc.underflow_clr = 0xff; /* blue */
140 pinfo->lcdc.hsync_skew = 0;
141 pinfo->clk_rate = 424000000;
142
143 pinfo->mipi.mode = DSI_VIDEO_MODE;
144 pinfo->mipi.pulse_mode_hsa_he = FALSE;
145 pinfo->mipi.hfp_power_stop = FALSE;
146 pinfo->mipi.hbp_power_stop = FALSE;
147 pinfo->mipi.hsa_power_stop = FALSE;
148 pinfo->mipi.eof_bllp_power_stop = FALSE;
149 pinfo->mipi.bllp_power_stop = FALSE;
150 pinfo->mipi.traffic_mode = DSI_NON_BURST_SYNCH_EVENT;
151 pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
152 pinfo->mipi.vc = 0;
153 pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RGB;
154 pinfo->mipi.data_lane0 = TRUE;
155 pinfo->mipi.data_lane1 = TRUE;
156 pinfo->mipi.data_lane2 = TRUE;
157 pinfo->mipi.data_lane3 = TRUE;
158 pinfo->mipi.t_clk_post = 0x04;
159 pinfo->mipi.t_clk_pre = 0x1b;
160 pinfo->mipi.stream = 0; /* dma_p */
161 pinfo->mipi.mdp_trigger = 0;
162 pinfo->mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
163 pinfo->mipi.frame_rate = 60;
164 pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
165 pinfo->mipi.tx_eot_append = TRUE;
166
167 pinfo->mipi.num_of_lanes = 4;
168 pinfo->mipi.panel_cmds = toshiba_mdv24_video_mode_cmds;
169 pinfo->mipi.num_of_panel_cmds =
170 ARRAY_SIZE(toshiba_mdv24_video_mode_cmds);
171
172 pinfo->on = mipi_toshiba_video_720p_on;
173 pinfo->off = mipi_toshiba_video_720p_off;
174 pinfo->config = mipi_toshiba_video_720p_config;
175
176 return;
177}