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Aparna Mallavarapuf712f5e2011-08-04 21:11:00 +05301/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29#include <mdp3.h>
30#include <debug.h>
31#include <reg.h>
32#include <target/display.h>
33#include <platform/timer.h>
34#include <platform/iomap.h>
35
36int mdp_setup_dma_p_video_mode(unsigned short disp_width,
37 unsigned short disp_height,
38 unsigned short img_width,
39 unsigned short img_height,
40 unsigned short hsync_porch0_fp,
41 unsigned short hsync_porch0_bp,
42 unsigned short vsync_porch0_fp,
43 unsigned short vsync_porch0_bp,
44 unsigned short hsync_width,
45 unsigned short vsync_width,
46 unsigned long input_img_addr,
47 unsigned short img_width_full_size,
48 unsigned short pack_pattern,
49 unsigned char ystride)
50{
51
52 // unsigned long mdp_intr_status;
53 int status = FAIL;
54 unsigned long hsync_period;
55 unsigned long vsync_period;
56 unsigned long vsync_period_intmd;
57
58 dprintf(SPEW, "MDP3.0.3 for DSI Video Mode\n");
59
60 hsync_period = img_width + hsync_porch0_fp + hsync_porch0_bp + 1;
61 vsync_period_intmd = img_height + vsync_porch0_fp + vsync_porch0_bp + 1;
62 vsync_period = vsync_period_intmd * hsync_period;
63
64
65 // ------------- programming MDP_DMA_P_CONFIG ---------------------
66 writel(0x1800bf, MDP_DMA_P_CONFIG); // rgb888
67
68 writel(0x00000000, MDP_DMA_P_OUT_XY);
69 writel(img_height << 16 | img_width, MDP_DMA_P_SIZE);
70 writel(input_img_addr, MDP_DMA_P_BUF_ADDR);
71 writel(img_width_full_size * ystride, MDP_DMA_P_BUF_Y_STRIDE);
72 writel(hsync_period << 16 | hsync_width, MDP_DSI_VIDEO_HSYNC_CTL);
73 writel(vsync_period, MDP_DSI_VIDEO_VSYNC_PERIOD);
74 writel(vsync_width * hsync_period, MDP_DSI_VIDEO_VSYNC_PULSE_WIDTH);
75 writel((img_width + hsync_porch0_bp - 1) << 16 | hsync_porch0_bp,
76 MDP_DSI_VIDEO_DISPLAY_HCTL);
77 writel(vsync_porch0_bp * hsync_period, MDP_DSI_VIDEO_DISPLAY_V_START);
78 writel((img_height + vsync_porch0_bp) * hsync_period,
79 MDP_DSI_VIDEO_DISPLAY_V_END);
80 writel(0x00ABCDEF, MDP_DSI_VIDEO_BORDER_CLR);
81 writel(0x00000000, MDP_DSI_VIDEO_HSYNC_SKEW);
82 writel(0x00000000, MDP_DSI_VIDEO_CTL_POLARITY);
83 // end of cmd mdp
84
85 writel(0x00000001, MDP_DSI_VIDEO_EN); // MDP_DSI_EN ENABLE
86
87 status = PASS;
88 return status;
89}
90void mdp_disable(void)
91{
92 writel(0x00000000, MDP_DSI_VIDEO_EN);
93}
94
95void mdp_shutdown(void)
96{
97 mdp_disable();
98 mdelay(60);
99 writel(0x00000000, MDP_INTR_ENABLE);
100 writel(0x01ffffff, MDP_INTR_CLEAR);
101}
102
103