blob: b1f6c3185213223faf7007a9da1bce7af5dcffc2 [file] [log] [blame]
Xiaoming Zhou327f7df2013-07-29 15:50:22 -04001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#include <stdint.h>
31#include <msm_panel.h>
32#include <mipi_dsi.h>
33#include <sys/types.h>
34#include <err.h>
35#include <reg.h>
36#include <debug.h>
37#include <target/display.h>
38#include <platform/iomap.h>
39
40#define WVGA_MIPI_FB_WIDTH 480
41#define WVGA_MIPI_FB_HEIGHT 800
42
43#define TRULY_PANEL_FRAME_RATE 60
44#define TRULY_PANEL_NUM_OF_LANES 2
45#define TRULY_PANEL_LANE_SWAP 0
46#define TRULY_PANEL_T_CLK_PRE 0x41b
47#define TRULY_PANEL_T_CLK_POST 0x0
48#define TRULY_PANEL_BPP 24
49#define TRULY_PANEL_CLK_RATE 499000000
50
51static char disp_on0[4] = {
52 0x01, 0x00, 0x05, 0x80
53};
54static char disp_on1[4] = {
55 0xB0, 0x04, 0x23, 0x80
56};
57static char disp_on2[8] = {
58 0x03, 0x00, 0x29, 0xC0,
59 0xB3, 0x02, 0x00, 0xFF
60};
61static char disp_on3[4] = {
62 0xBD, 0x00, 0x23, 0x80
63};
64static char disp_on4[8] = {
65 0x03, 0x00, 0x29, 0xC0,
66 0xC0, 0x18, 0x66, 0xFF
67};
68static char disp_on5[20] = {
69 0x10, 0x00, 0x29, 0xC0,
70 0xC1, 0x23, 0x31, 0x99,
71 0x21, 0x20, 0x00, 0x30,
72 0x28, 0x0C, 0x0C, 0x00,
73 0x00, 0x00, 0x21, 0x01
74};
75static char disp_on6[12] = {
76 0x07, 0x00, 0x29, 0xC0,
77 0xC2, 0x00, 0x06, 0x06,
78 0x01, 0x03, 0x00, 0xFF
79};
80static char disp_on7[32] = {
81 0x19, 0x00, 0x29, 0xC0,
82 0xC8, 0x04, 0x10, 0x18,
83 0x20, 0x2E, 0x46, 0x3C,
84 0x28, 0x1F, 0x18, 0x10,
85 0x04, 0x04, 0x10, 0x18,
86 0x20, 0x2E, 0x46, 0x3C,
87 0x28, 0x1F, 0x18, 0x10,
88 0x04, 0xFF, 0xFF, 0xFF
89};
90static char disp_on8[32] = {
91 0x19, 0x00, 0x29, 0xC0,
92 0xC9, 0x04, 0x10, 0x18,
93 0x20, 0x2E, 0x46, 0x3C,
94 0x28, 0x1F, 0x18, 0x10,
95 0x04, 0x04, 0x10, 0x18,
96 0x20, 0x2E, 0x46, 0x3C,
97 0x28, 0x1F, 0x18, 0x10,
98 0x04, 0xFF, 0xFF, 0xFF
99};
100static char disp_on9[32] = {
101 0x19, 0x00, 0x29, 0xC0,
102 0xCA, 0x04, 0x10, 0x18,
103 0x20, 0x2E, 0x46, 0x3C,
104 0x28, 0x1F, 0x18, 0x10,
105 0x04, 0x04, 0x10, 0x18,
106 0x20, 0x2E, 0x46, 0x3C,
107 0x28, 0x1F, 0x18, 0x10,
108 0x04, 0xFF, 0xFF, 0xFF
109};
110static char disp_on10[24] = {
111 0x11, 0x00, 0x29, 0xC0,
112 0xD0, 0x29, 0x03, 0xce,
113 0xa6, 0x00, 0x43, 0x20,
114 0x10, 0x01, 0x00, 0x01,
115 0x01, 0x00, 0x03, 0x01,
116 0x00, 0xFF, 0xFF, 0xFF
117};
118static char disp_on11[12] = {
119 0x08, 0x00, 0x29, 0xC0,
120 0xD1, 0x18, 0x0C, 0x23,
121 0x03, 0x75, 0x02, 0x50
122};
123static char disp_on12[4] = {
124 0xD3, 0x11, 0x23, 0x80
125};
126static char disp_on13[8] = {
127 0x03, 0x00, 0x29, 0xC0,
128 0xD5, 0x2A, 0x2A, 0xFF
129};
130static char disp_on14[8] = {
131 0x03, 0x00, 0x29, 0xC0,
132 0xDE, 0x01, 0x51, 0xFF
133};
134static char disp_on15[4] = {
135 0xE6, 0x51, 0x23, 0x80
136};
137static char disp_on16[4] = {
138 0xFA, 0x03, 0x23, 0x80
139};
140static char disp_on17[4] = {
141 0xD6, 0x28, 0x23, 0x80
142};
143static char disp_on18[4] = {
144 0x36, 0x41, 0x15, 0x80
145};
146static char disp_on19[12] = {
147 0x05, 0x00, 0x39, 0xC0,
148 0x2A, 0x00, 0x00, 0x01,
149 0xDF, 0xFF, 0xFF, 0xFF
150};
151static char disp_on20[12] = {
152 0x05, 0x00, 0x39, 0xC0,
153 0x2B, 0x00, 0x00, 0x03,
154 0x1F, 0xFF, 0xFF, 0xFF
155};
156static char disp_on21[4] = {
157 0x35, 0x00, 0x15, 0x80
158};
159static char disp_on22[8] = {
160 0x03, 0x00, 0x39, 0xc0,
161 0x44, 0x00, 0x50, 0xFF
162};
163static char disp_on23[4] = {
164 0x3A, 0x77, 0x15, 0x80
165};
166static char disp_on24[4] = {
167 0x11, 0x00, 0x05, 0x80
168};
169static char disp_on25[4] = {
170 0x29, 0x00, 0x05, 0x80
171};
172
173static struct mipi_dsi_cmd truly_wvga_panel_cmd_mode_cmds[] = {
174 {sizeof(disp_on0), (char *)disp_on0},
175 {sizeof(disp_on1), (char *)disp_on1},
176 {sizeof(disp_on2), (char *)disp_on2},
177 {sizeof(disp_on3), (char *)disp_on3},
178 {sizeof(disp_on4), (char *)disp_on4},
179 {sizeof(disp_on5), (char *)disp_on5},
180 {sizeof(disp_on6), (char *)disp_on6},
181 {sizeof(disp_on7), (char *)disp_on7},
182 {sizeof(disp_on8), (char *)disp_on8},
183 {sizeof(disp_on9), (char *)disp_on9},
184 {sizeof(disp_on10), (char *)disp_on10},
185 {sizeof(disp_on11), (char *)disp_on11},
186 {sizeof(disp_on12), (char *)disp_on12},
187 {sizeof(disp_on13), (char *)disp_on13},
188 {sizeof(disp_on14), (char *)disp_on14},
189 {sizeof(disp_on15), (char *)disp_on15},
190 {sizeof(disp_on16), (char *)disp_on16},
191 {sizeof(disp_on17), (char *)disp_on17},
192 {sizeof(disp_on18), (char *)disp_on18},
193 {sizeof(disp_on19), (char *)disp_on19},
194 {sizeof(disp_on20), (char *)disp_on20},
195 {sizeof(disp_on21), (char *)disp_on21},
196 {sizeof(disp_on22), (char *)disp_on22},
197 {sizeof(disp_on23), (char *)disp_on23},
198 {sizeof(disp_on24), (char *)disp_on24},
199 {sizeof(disp_on25), (char *)disp_on25},
200};
201
202int mipi_truly_cmd_wvga_config(void *pdata)
203{
204 int ret = NO_ERROR;
205 /* 2 Lanes -- Enables Data Lane0, 1 */
206 unsigned char lane_en = 0x3;
207 unsigned long low_pwr_stop_mode = 0;
208
209 /* Needed or else will have blank line at top of display */
210 unsigned char eof_bllp_pwr = 0x9;
211
212 unsigned char interleav = 0;
213 struct lcdc_panel_info *lcdc = NULL;
214 struct msm_panel_info *pinfo = (struct msm_panel_info *) pdata;
215
216 if (pinfo == NULL)
217 return ERR_INVALID_ARGS;
218
219 lcdc = &(pinfo->lcdc);
220 if (lcdc == NULL)
221 return ERR_INVALID_ARGS;
222
223 ret = mdss_dsi_cmd_mode_config((pinfo->xres + lcdc->xres_pad),
224 (pinfo->yres + lcdc->yres_pad),
225 (pinfo->xres),
226 (pinfo->yres),
227 pinfo->mipi.dst_format,
228 pinfo->bpp / 8,
229 lane_en,
230 0);
231
232 return ret;
233}
234
235int mipi_truly_cmd_wvga_on()
236{
237 int ret = NO_ERROR;
238 return ret;
239}
240
241int mipi_truly_cmd_wvga_off()
242{
243 int ret = NO_ERROR;
244 return ret;
245}
246
247static struct mdss_dsi_phy_ctrl dsi_video_mode_phy_db = {
248 /* regulator */
249 {0x02, 0x08, 0x05, 0x00, 0x20, 0x03},
250 /* timing */
251 {0x5d, 0x12, 0x0c, 0x00, 0x33, 0x38,
252 0x10, 0x16, 0x1e, 0x03, 0x04, 0x00},
253 /* phy ctrl */
254 {0x7f, 0x00, 0x00, 0x00},
255 /* strength */
256 {0xff, 0x06},
257 /* bist */
258 {0x03, 0x03, 0x00, 0x00, 0x0f, 0x00},
259 /* lane config */
260 {0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
261 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
262 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
263 0x80, 0x45, 0x00, 0x00, 0x00, 0x01, 0x66, 0x00, 0x00,
264 0x40, 0x67, 0x00, 0x00, 0x00, 0x01, 0x88, 0x00, 0x00},
265};
266
267void mipi_truly_cmd_wvga_init(struct msm_panel_info *pinfo)
268{
269 if (!pinfo)
270 return;
271
272 pinfo->xres = WVGA_MIPI_FB_WIDTH;
273 pinfo->yres = WVGA_MIPI_FB_HEIGHT;
274 pinfo->lcdc.h_back_porch = MIPI_HSYNC_BACK_PORCH_DCLK;
275 pinfo->lcdc.h_front_porch = MIPI_HSYNC_FRONT_PORCH_DCLK;
276 pinfo->lcdc.h_pulse_width = MIPI_HSYNC_PULSE_WIDTH;
277 pinfo->lcdc.v_back_porch = MIPI_VSYNC_BACK_PORCH_LINES;
278 pinfo->lcdc.v_front_porch = MIPI_VSYNC_FRONT_PORCH_LINES;
279 pinfo->lcdc.v_pulse_width = MIPI_VSYNC_PULSE_WIDTH;
280 pinfo->mipi.num_of_lanes = TRULY_PANEL_NUM_OF_LANES;
281 pinfo->mipi.frame_rate = TRULY_PANEL_FRAME_RATE;
282
283 pinfo->type = MIPI_CMD_PANEL;
284 pinfo->wait_cycle = 0;
285 pinfo->bpp = TRULY_PANEL_BPP;
286 pinfo->clk_rate = TRULY_PANEL_CLK_RATE;
287
288 pinfo->mipi.mode = DSI_CMD_MODE;
289 pinfo->mipi.traffic_mode = 1;
290 pinfo->mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
291 pinfo->mipi.vc = 0;
292 pinfo->mipi.lane_swap = TRULY_PANEL_LANE_SWAP;
293 pinfo->mipi.data_lane0 = TRUE;
294 pinfo->mipi.data_lane1 = TRUE;
295 pinfo->mipi.data_lane2 = FALSE;
296 pinfo->mipi.data_lane3 = FALSE;
297 pinfo->mipi.t_clk_post = TRULY_PANEL_T_CLK_POST;
298 pinfo->mipi.t_clk_pre = TRULY_PANEL_T_CLK_PRE;
299 pinfo->mipi.stream = 0;
300 pinfo->mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
301 pinfo->mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
302
303 pinfo->mipi.mdss_dsi_phy_db = &dsi_video_mode_phy_db;
304 pinfo->mipi.tx_eot_append = TRUE;
305
306 pinfo->mipi.panel_cmds = truly_wvga_panel_cmd_mode_cmds;
307 pinfo->mipi.num_of_panel_cmds = ARRAY_SIZE(truly_wvga_panel_cmd_mode_cmds);
308
309 pinfo->on = mipi_truly_cmd_wvga_on;
310 pinfo->off = mipi_truly_cmd_wvga_off;
311 pinfo->config = mipi_truly_cmd_wvga_config;
312
313 return;
314}