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Dima Zavin36785e32009-01-28 17:26:43 -08001/*
2 * Copyright (c) 2008, Google Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in
12 * the documentation and/or other materials provided with the
13 * distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#ifndef __PLATFORM_MSM7K_MDDI_HW_H
30#define __PLATFORM_MSM7K_MDDI_HW_H
31
Chandan Uddaraju2943fd62010-06-21 10:56:39 -070032#ifdef TARGET_MSM7630_SURF
33#define MSM_MDDI_BASE 0xAD600000
34#else
Dima Zavin36785e32009-01-28 17:26:43 -080035#define MSM_MDDI_BASE 0xAA600000
Chandan Uddaraju2943fd62010-06-21 10:56:39 -070036#endif
Dima Zavin36785e32009-01-28 17:26:43 -080037
Chandan Uddarajuc009e4d2010-09-08 17:06:45 -070038#if MDP4
39#define MSM_MDP_BASE1 0xA3F00000
40#define LCDC_BASE 0xC0000
41#else
42#define MSM_MDP_BASE1 0xAA200000
43#define LCDC_BASE 0xE0000
44#endif
45
Channagoud Kadabi51ea9722011-08-25 14:56:53 +053046#ifdef MDDI_MULTI_WRITE
47#define MAX_CLIENT_REG 128
48#else
49#define MAX_CLIENT_REG 1
50#endif
51
Ajay Dudanib01e5062011-12-03 23:23:42 -080052enum { /* display configuration for MDP4 */
53 PRIMARY_INTF_SEL,
54 SECONDARY_INTF_SEL,
55 EXTERNAL_INTF_SEL
Chandan Uddarajuc009e4d2010-09-08 17:06:45 -070056};
57
58#define outp32(port, val) (*((volatile unsigned *) (port)) = ((unsigned) (val)))
59
Dima Zavin36785e32009-01-28 17:26:43 -080060/* see 80-VA736-2 C pp 776-787 */
61
62#define MDDI_REG(off) (MSM_MDDI_BASE + (off))
63
64#define MDDI_CMD MDDI_REG(0x0000)
65#define MDDI_VERSION MDDI_REG(0x0004)
66#define MDDI_PRI_PTR MDDI_REG(0x0008)
67#define MDDI_SEC_PTR MDDI_REG(0x000C)
68#define MDDI_BPS MDDI_REG(0x0010)
69#define MDDI_SPM MDDI_REG(0x0014)
70#define MDDI_INT MDDI_REG(0x0018)
71
72#define MDDI_INT_PRI_PTR_READ (1 << 0)
73#define MDDI_INT_SEC_PTR_READ (1 << 1)
74#define MDDI_INT_REV_DATA_AVAIL (1 << 2)
75#define MDDI_INT_DISP_REQ (1 << 3)
76#define MDDI_INT_PRI_UNDERFLOW (1 << 4)
77#define MDDI_INT_SEC_UNDERFLOW (1 << 5)
78#define MDDI_INT_REV_OVERFLOW (1 << 6)
79#define MDDI_INT_CRC_ERROR (1 << 7)
80#define MDDI_INT_MDDI_IN (1 << 8)
81#define MDDI_INT_PRI_OVERWRITE (1 << 9)
82#define MDDI_INT_SEC_OVERWRITE (1 << 10)
83#define MDDI_INT_REV_OVERWRITE (1 << 11)
84#define MDDI_INT_DMA_FAILURE (1 << 12)
85#define MDDI_INT_LINK_ACTIVE (1 << 13)
86#define MDDI_INT_IN_HIBERNATION (1 << 14)
87#define MDDI_INT_PRI_LINK_LIST_DONE (1 << 15)
88#define MDDI_INT_SEC_LINK_LIST_DONE (1 << 16)
89#define MDDI_INT_NO_REQ_PKTS_PENDING (1 << 17)
90#define MDDI_INT_RTD_FAILURE (1 << 18)
91#define MDDI_INT_REV_PKT_RECEIVED (1 << 19)
92#define MDDI_INT_REV_PKTS_AVAIL (1 << 20)
93
94#define MDDI_INTEN MDDI_REG(0x001C)
95#define MDDI_REV_PTR MDDI_REG(0x0020)
96#define MDDI_REV_SIZE MDDI_REG(0x0024)
97#define MDDI_STAT MDDI_REG(0x0028)
98
99#define MDDI_STAT_LINK_ACTIVE (1 << 0)
100#define MDDI_STAT_NEW_REV_PTR (1 << 1)
101#define MDDI_STAT_NEW_PRI_PTR (1 << 2)
102#define MDDI_STAT_NEW_SEC_PTR (1 << 3)
103#define MDDI_STAT_IN_HIBERNATION (1 << 4)
104#define MDDI_STAT_PRI_LINK_LIST_DONE (1 << 5)
105#define MDDI_STAT_SEC_LINK_LIST_DONE (1 << 6)
106#define MDDI_STAT_SEND_TIMING_PKT (1 << 7)
107#define MDDI_STAT_SEND_REV_ENCAP_WITH_FLAGS (1 << 8)
108#define MDDI_STAT_SEND_POWER_DOWN (1 << 9)
109#define MDDI_STAT_DO_HANDSHAKE (1 << 10)
110#define MDDI_STAT_RTD_MEAS_FAIL (1 << 11)
111#define MDDI_STAT_CLIENT_WAKEUP_REQ (1 << 12)
112#define MDDI_STAT_DMA_ABORT (1 << 13)
113#define MDDI_STAT_REV_OVERFLOW_RESET (1 << 14)
114#define MDDI_STAT_FORCE_NEW_REV_PTR (1 << 15)
115#define MDDI_STAT_CRC_ERRORS (1 << 16)
116
117#define MDDI_REV_RATE_DIV MDDI_REG(0x002C)
118#define MDDI_REV_CRC_ERR MDDI_REG(0x0030)
119#define MDDI_TA1_LEN MDDI_REG(0x0034)
120#define MDDI_TA2_LEN MDDI_REG(0x0038)
121#define MDDI_TEST_BUS MDDI_REG(0x003C)
122#define MDDI_TEST MDDI_REG(0x0040)
123#define MDDI_REV_PKT_CNT MDDI_REG(0x0044)
124#define MDDI_DRIVE_HI MDDI_REG(0x0048)
125#define MDDI_DRIVE_LO MDDI_REG(0x004C)
126#define MDDI_DISP_WAKE MDDI_REG(0x0050)
127#define MDDI_REV_ENCAP_SZ MDDI_REG(0x0054)
128#define MDDI_RTD_VAL MDDI_REG(0x0058)
129#define MDDI_MDP_VID_FMT_DES MDDI_REG(0x005C)
130#define MDDI_MDP_VID_PIX_ATTR MDDI_REG(0x0060)
131#define MDDI_MDP_VID_CLIENTID MDDI_REG(0x0064)
132#define MDDI_PAD_CTL MDDI_REG(0x0068)
133#define MDDI_DRIVER_START_CNT MDDI_REG(0x006C)
134#define MDDI_NEXT_PRI_PTR MDDI_REG(0x0070)
135#define MDDI_NEXT_SEC_PTR MDDI_REG(0x0074)
136#define MDDI_MISR_CTL MDDI_REG(0x0078)
137#define MDDI_MISR_DATA MDDI_REG(0x007C)
138#define MDDI_SF_CNT MDDI_REG(0x0080)
139#define MDDI_MF_CNT MDDI_REG(0x0084)
140#define MDDI_CURR_REV_PTR MDDI_REG(0x0088)
141#define MDDI_CORE_VER MDDI_REG(0x008C)
Chandan Uddarajuc009e4d2010-09-08 17:06:45 -0700142#define MDDI_PAD_IO_CTL MDDI_REG(0x00a0)
143#define MDDI_PAD_CAL MDDI_REG(0x00a4)
144
Dima Zavin36785e32009-01-28 17:26:43 -0800145#define CMD_POWER_DOWN 0x0100
146#define CMD_POWER_UP 0x0200
147#define CMD_HIBERNATE 0x0300
148#define CMD_RESET 0x0400
149#define CMD_IGNORE 0x0501
150#define CMD_LISTEN 0x0500
151#define CMD_REV_ENC_REQ 0x0600
152#define CMD_RTD_MEASURE 0x0700
153#define CMD_LINK_ACTIVE 0x0900
154#define CMD_PERIODIC_REV_ENC 0x0A00
155#define CMD_FORCE_NEW_REV_PTR 0x0C00
156
157#define CMD_GET_CLIENT_CAP 0x0601
158#define CMD_GET_CLIENT_STATUS 0x0602
159
160#if 1
161#define FORMAT_18BPP 0x5666
162#define FORMAT_24BPP 0x5888
163#define FORMAT_16BPP 0x5565
164#else
165#define FORMAT_MONOCHROME (0 << 13)
166#define FORMAT_PALETTE (1 << 13)
167#define FORMAT_RGB (2 << 13)
168#define FORMAT_YCBCR422 (3 << 13)
169#define FORMAT_BAYER (4 << 13)
170#endif
171
172#define PIXATTR_BOTH_EYES 3
173#define PIXATTR_LEFT_EYE 2
174#define PIXATTR_RIGHT_EYE 1
175#define PIXATTR_ALT_DISPLAY 0
176
177#define PIXATTR_PROGRESSIVE 0
178#define PIXATTR_INTERLACED (1 << 2)
179#define PIXATTR_ALTERNATE (1 << 3)
180
181#define PIXATTR_IGNORE_LRTB (1 << 5)
182
183#define PIXATTR_TO_REFRESH (0 << 6)
184#define PIXATTR_TO_OFFLINE (1 << 6)
185#define PIXATTR_TO_ALL (3 << 6)
186
187#define PIXATTR_LAST_ROW (1 << 15)
188
189#define TYPE_VIDEO_STREAM 16
190#define TYPE_CLIENT_CAPS 66
191#define TYPE_REGISTER_ACCESS 146
192#define TYPE_CLIENT_STATUS 70
193
194typedef struct mddi_video_stream mddi_video_stream;
195typedef struct mddi_register_access mddi_register_access;
196typedef struct mddi_client_caps mddi_client_caps;
197
198typedef struct mddi_llentry mddi_llentry;
199
Ajay Dudanib01e5062011-12-03 23:23:42 -0800200struct __attribute__ ((packed)) mddi_video_stream {
201 unsigned short length; /* length in bytes excluding this field */
202 unsigned short type; /* MDDI_TYPE_VIDEO_STREAM */
203 unsigned short client_id; /* set to zero */
Dima Zavin36785e32009-01-28 17:26:43 -0800204
Ajay Dudanib01e5062011-12-03 23:23:42 -0800205 unsigned short format;
206 unsigned short pixattr;
Dima Zavin36785e32009-01-28 17:26:43 -0800207
Ajay Dudanib01e5062011-12-03 23:23:42 -0800208 unsigned short left;
209 unsigned short top;
210 unsigned short right;
211 unsigned short bottom;
Dima Zavin36785e32009-01-28 17:26:43 -0800212
Ajay Dudanib01e5062011-12-03 23:23:42 -0800213 unsigned short start_x;
214 unsigned short start_y;
Dima Zavin36785e32009-01-28 17:26:43 -0800215
Ajay Dudanib01e5062011-12-03 23:23:42 -0800216 unsigned short pixels;
217
218 unsigned short crc;
219 unsigned short reserved;
Dima Zavin36785e32009-01-28 17:26:43 -0800220};
221
Ajay Dudanib01e5062011-12-03 23:23:42 -0800222struct __attribute__ ((packed)) mddi_register_access {
223 unsigned short length;
224 unsigned short type;
225 unsigned short client_id;
Dima Zavin36785e32009-01-28 17:26:43 -0800226
Ajay Dudanib01e5062011-12-03 23:23:42 -0800227 unsigned short rw_info; /* flag below | count of reg_data */
Dima Zavin36785e32009-01-28 17:26:43 -0800228#define MDDI_WRITE (0 << 14)
229#define MDDI_READ (2 << 14)
230#define MDDI_READ_RESP (3 << 14)
Dima Zavin36785e32009-01-28 17:26:43 -0800231
Ajay Dudanib01e5062011-12-03 23:23:42 -0800232 unsigned reg_addr;
233 unsigned short crc; /* 16 bit crc of the above */
234
235 unsigned reg_data[MAX_CLIENT_REG]; /* "list" of 3byte data values */
Dima Zavin36785e32009-01-28 17:26:43 -0800236};
237
Ajay Dudanib01e5062011-12-03 23:23:42 -0800238struct __attribute__ ((packed)) mddi_llentry {
239 unsigned short flags;
240 unsigned short header_count;
241 unsigned short data_count;
242 void *data;
243 mddi_llentry *next;
244 unsigned short reserved;
245 union {
246 mddi_video_stream v;
247 mddi_register_access r;
248 unsigned _[12];
249 } u;
Dima Zavin36785e32009-01-28 17:26:43 -0800250};
251
Ajay Dudanib01e5062011-12-03 23:23:42 -0800252#endif /* __PLATFORM_MSM7K_MDDI_HW_H */