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Unnati Gandhib3820bc2014-07-04 16:56:27 +05301/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
Unnati Gandhi89d71a12014-09-18 12:01:08 +053029#ifndef __IRQS_MSM8909_H
30#define __IRQS_MSM8909_H
Unnati Gandhib3820bc2014-07-04 16:56:27 +053031
32/* MSM ACPU Interrupt Numbers */
33
34/* 0-15: STI/SGI (software triggered/generated interrupts)
35 * 16-31: PPI (private peripheral interrupts)
36 * 32+: SPI (shared peripheral interrupts)
37 */
Unnati Gandhib3820bc2014-07-04 16:56:27 +053038
39#define GIC_PPI_START 16
40#define GIC_SPI_START 32
41
42#define INT_QTMR_NON_SECURE_PHY_TIMER_EXP (GIC_PPI_START + 3)
43#define INT_QTMR_VIRTUAL_TIMER_EXP (GIC_PPI_START + 4)
44
45#define INT_QTMR_FRM_0_PHYSICAL_TIMER_EXP (GIC_SPI_START + 8)
46
47#define USB1_HS_BAM_IRQ (GIC_SPI_START + 135)
48#define USB1_HS_IRQ (GIC_SPI_START + 134)
49
Unnati Gandhi4d637e42014-07-11 14:47:25 +053050#define SDCC1_PWRCTL_IRQ (GIC_SPI_START + 138)
51#define SDCC2_PWRCTL_IRQ (GIC_SPI_START + 221)
52
Unnati Gandhic24a86f2014-09-19 16:07:16 +053053#define SMD_IRQ (GIC_SPI_START + 168)
54
Unnati Gandhib3820bc2014-07-04 16:56:27 +053055/* Retrofit universal macro names */
56#define INT_USB_HS USB1_HS_IRQ
57
58#define EE0_KRAIT_HLOS_SPMI_PERIPH_IRQ (GIC_SPI_START + 190)
59
60#define NR_MSM_IRQS 256
61#define NR_GPIO_IRQS 173
62#define NR_BOARD_IRQS 0
63
64#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + \
65 NR_BOARD_IRQS)
66
Unnati Gandhi88cf23b2014-12-10 15:39:12 +053067#define BLSP_QUP_IRQ(blsp_id, qup_id) (GIC_SPI_START + 95 + qup_id)
Unnati Gandhi89d71a12014-09-18 12:01:08 +053068#endif /* __IRQS_MSM8909_H */