Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 1 | /* Copyright (c) 2019, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef _PANEL_TRULY_RM69090_QVGA_CMD_H_ |
| 30 | #define _PANEL_TRULY_RM69090_QVGA_CMD_H_ |
| 31 | /*---------------------------------------------------------------------------*/ |
| 32 | /* HEADER files */ |
| 33 | /*---------------------------------------------------------------------------*/ |
| 34 | #include "panel.h" |
| 35 | |
| 36 | /*---------------------------------------------------------------------------*/ |
| 37 | /* Panel configuration */ |
| 38 | /*---------------------------------------------------------------------------*/ |
| 39 | static struct panel_config truly_rm69090_qvga_cmd_panel_data = { |
| 40 | "qcom,mdss_dsi_truly_rm69090_qvga_cmd", "dsi:0:", "qcom,mdss-dsi-panel", |
| 41 | 10, 1, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL |
| 42 | }; |
| 43 | |
| 44 | /*---------------------------------------------------------------------------*/ |
| 45 | /* Panel resolution */ |
| 46 | /*---------------------------------------------------------------------------*/ |
| 47 | static struct panel_resolution truly_rm69090_qvga_cmd_panel_res = { |
| 48 | 368, 448, 40, 20, 2, 0, 6, 8, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 |
| 49 | }; |
| 50 | |
| 51 | /*---------------------------------------------------------------------------*/ |
| 52 | /* Panel color information */ |
| 53 | /*---------------------------------------------------------------------------*/ |
| 54 | static struct color_info truly_rm69090_qvga_cmd_color = { |
| 55 | 24, 0, 0xff, 0, 0, 0 |
| 56 | }; |
| 57 | |
| 58 | /*---------------------------------------------------------------------------*/ |
| 59 | /* Panel on/off command information */ |
| 60 | /*---------------------------------------------------------------------------*/ |
| 61 | static char truly_rm69090_qvga_cmd_on_cmd0[] = { |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 62 | 0xFE, 0x01, 0x15, 0x80 |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 63 | }; |
| 64 | |
| 65 | static char truly_rm69090_qvga_cmd_on_cmd1[] = { |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 66 | 0x6A, 0x03, 0x15, 0x80 |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | static char truly_rm69090_qvga_cmd_on_cmd2[] = { |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 70 | 0xFE, 0x00, 0x15, 0x80 |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 71 | }; |
| 72 | |
| 73 | static char truly_rm69090_qvga_cmd_on_cmd3[] = { |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 74 | 0x35, 0x00, 0x15, 0x80 |
| 75 | }; |
| 76 | |
| 77 | static char truly_rm69090_qvga_cmd_on_cmd4[] = { |
| 78 | 0x53, 0x20, 0x15, 0x80 |
| 79 | }; |
| 80 | |
| 81 | static char truly_rm69090_qvga_cmd_on_cmd5[] = { |
| 82 | 0x51, 0x80, 0x15, 0x80 |
| 83 | }; |
| 84 | |
| 85 | static char truly_rm69090_qvga_cmd_on_cmd6[] = { |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 86 | 0x05, 0x00, 0x39, 0xC0, |
| 87 | 0x2A, 0x00, 0x10, 0x01, |
| 88 | 0x7F, 0xFF, 0xFF, 0xFF, |
| 89 | }; |
| 90 | |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 91 | static char truly_rm69090_qvga_cmd_on_cmd7[] = { |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 92 | 0x05, 0x00, 0x39, 0xC0, |
| 93 | 0x2B, 0x00, 0x00, 0x01, |
| 94 | 0xBF, 0xFF, 0xFF, 0xFF, |
| 95 | }; |
| 96 | |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 97 | static char truly_rm69090_qvga_cmd_on_cmd8[] = { |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 98 | 0x11, 0x00, 0x05, 0x80 |
| 99 | }; |
| 100 | |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 101 | static char truly_rm69090_qvga_cmd_on_cmd9[] = { |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 102 | 0x29, 0x00, 0x05, 0x80 |
| 103 | }; |
| 104 | |
| 105 | static struct mipi_dsi_cmd truly_rm69090_qvga_cmd_on_command[] = { |
| 106 | {0x4, truly_rm69090_qvga_cmd_on_cmd0, 0x00}, |
| 107 | {0x4, truly_rm69090_qvga_cmd_on_cmd1, 0x00}, |
| 108 | {0x4, truly_rm69090_qvga_cmd_on_cmd2, 0x00}, |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 109 | {0x4, truly_rm69090_qvga_cmd_on_cmd3, 0x00}, |
| 110 | {0x4, truly_rm69090_qvga_cmd_on_cmd4, 0x00}, |
| 111 | {0x4, truly_rm69090_qvga_cmd_on_cmd5, 0x00}, |
| 112 | {0xc, truly_rm69090_qvga_cmd_on_cmd6, 0x00}, |
| 113 | {0xc, truly_rm69090_qvga_cmd_on_cmd7, 0x00}, |
| 114 | {0x4, truly_rm69090_qvga_cmd_on_cmd8, 0x78}, |
| 115 | {0x4, truly_rm69090_qvga_cmd_on_cmd9, 0x40} |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 116 | }; |
| 117 | |
Xipeng Gu | 1257ded | 2019-09-02 11:03:46 +0800 | [diff] [blame] | 118 | #define TRULY_RM69090_QVGA_CMD_ON_COMMAND 10 |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 119 | |
| 120 | |
| 121 | static char truly_rm69090_qvga_cmdoff_cmd0[] = { |
| 122 | 0x28, 0x00, 0x05, 0x80 |
| 123 | }; |
| 124 | |
| 125 | static char truly_rm69090_qvga_cmdoff_cmd1[] = { |
| 126 | 0x10, 0x00, 0x05, 0x80 |
| 127 | }; |
| 128 | |
| 129 | static char truly_rm69090_qvga_cmdoff_cmd2[] = { |
| 130 | 0x4F, 0x01, 0x15, 0x80 |
| 131 | }; |
| 132 | |
| 133 | static struct mipi_dsi_cmd truly_rm69090_qvga_cmd_off_command[] = { |
| 134 | {0x4, truly_rm69090_qvga_cmdoff_cmd0, 0x28}, |
| 135 | {0x4, truly_rm69090_qvga_cmdoff_cmd1, 0x78}, |
| 136 | {0x4, truly_rm69090_qvga_cmdoff_cmd2, 0x00} |
| 137 | }; |
| 138 | |
| 139 | #define TRULY_RM69090_QVGA_CMD_OFF_COMMAND 3 |
| 140 | |
| 141 | |
| 142 | static struct command_state truly_rm69090_qvga_cmd_state = { |
| 143 | 0, 1 |
| 144 | }; |
| 145 | |
| 146 | /*---------------------------------------------------------------------------*/ |
| 147 | /* Command mode panel information */ |
| 148 | /*---------------------------------------------------------------------------*/ |
| 149 | static struct commandpanel_info truly_rm69090_qvga_cmd_command_panel = { |
Xipeng Gu | 85b8a61 | 2019-08-08 14:45:05 +0800 | [diff] [blame] | 150 | 1, 1, 1, 1, 2, 0x2c, 0, 0, 0, 1, 0, 0 |
Xipeng Gu | 94b23cc | 2019-07-17 16:53:53 +0800 | [diff] [blame] | 151 | }; |
| 152 | |
| 153 | /*---------------------------------------------------------------------------*/ |
| 154 | /* Video mode panel information */ |
| 155 | /*---------------------------------------------------------------------------*/ |
| 156 | static struct videopanel_info truly_rm69090_qvga_cmd_video_panel = { |
| 157 | 1, 0, 0, 0, 1, 1, 2, 0, 0x9 |
| 158 | }; |
| 159 | |
| 160 | /*---------------------------------------------------------------------------*/ |
| 161 | /* Lane configuration */ |
| 162 | /*---------------------------------------------------------------------------*/ |
| 163 | static struct lane_configuration truly_rm69090_qvga_cmd_lane_config = { |
| 164 | 1, 0, 1, 0, 0, 0, 0 |
| 165 | }; |
| 166 | |
| 167 | /*---------------------------------------------------------------------------*/ |
| 168 | /* Panel timing */ |
| 169 | /*---------------------------------------------------------------------------*/ |
| 170 | static const uint32_t truly_rm69090_qvga_cmd_12nm_timings[] = { |
| 171 | 0x04, 0x04, 0x01, 0x08, 0x00, 0x03, 0x01, 0x0D |
| 172 | }; |
| 173 | |
| 174 | static struct panel_timing truly_rm69090_qvga_cmd_timing_info = { |
| 175 | 0, 4, 0x09, 0x2c |
| 176 | }; |
| 177 | |
| 178 | /*---------------------------------------------------------------------------*/ |
| 179 | /* Panel reset sequence */ |
| 180 | /*---------------------------------------------------------------------------*/ |
| 181 | static struct panel_reset_sequence truly_rm69090_qvga_cmd_reset_seq = { |
| 182 | {1, 0, 1, }, {1, 12, 12, }, 2 |
| 183 | }; |
| 184 | |
| 185 | /*---------------------------------------------------------------------------*/ |
| 186 | /* Backlight setting */ |
| 187 | /*---------------------------------------------------------------------------*/ |
| 188 | static struct backlight truly_rm69090_qvga_cmd_backlight = { |
| 189 | 2, 1, 255, 100, 2, "BL_CTL_DCS" |
| 190 | }; |
| 191 | |
| 192 | #endif /*_PANEL_TRULY_RM69090_QVGA_CMD_H_*/ |