Kinson Chik | ea64624 | 2011-09-01 13:53:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008, Google Inc. |
| 3 | * All rights reserved. |
| 4 | * |
Duy Truong | f3ac7b3 | 2013-02-13 01:07:28 -0800 | [diff] [blame] | 5 | * Copyright (c) 2009-2011, The Linux Foundation. All rights reserved. |
Kinson Chik | ea64624 | 2011-09-01 13:53:16 -0700 | [diff] [blame] | 6 | * |
| 7 | * Redistribution and use in source and binary forms, with or without |
| 8 | * modification, are permitted provided that the following conditions |
| 9 | * are met: |
| 10 | * * Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * * Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in |
| 14 | * the documentation and/or other materials provided with the |
| 15 | * distribution. |
| 16 | * * Neither the name of Google, Inc. nor the names of its contributors |
| 17 | * may be used to endorse or promote products derived from this |
| 18 | * software without specific prior written permission. |
| 19 | * |
| 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 21 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 22 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 23 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 24 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 26 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| 27 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 28 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 30 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 31 | * SUCH DAMAGE. |
| 32 | */ |
| 33 | #ifndef __DEV_SSBI_H |
| 34 | #define __DEV_SSBI_H |
| 35 | |
| 36 | //Macros for SSBI Qwerty keypad for 7x30 |
| 37 | |
| 38 | /* SSBI 2.0 controller registers */ |
| 39 | #define MSM_SSBI_BASE 0xAD900000 |
| 40 | |
| 41 | #define SSBI_TIMEOUT_US 100 |
| 42 | |
| 43 | #define SSBI2_CTL 0x0000 |
| 44 | #define SSBI2_RESET 0x0004 |
| 45 | #define SSBI2_CMD 0x0008 |
| 46 | #define SSBI2_RD 0x0010 |
| 47 | #define SSBI2_STATUS 0x0014 |
| 48 | #define SSBI2_PRIORITIES 0x0018 |
| 49 | #define SSBI2_MODE2 0x001C |
| 50 | |
| 51 | /* SSBI_CMD fields */ |
| 52 | #define SSBI_CMD_SEND_TERM_SYM (0x01 << 27) |
| 53 | #define SSBI_CMD_WAKEUP_SLAVE (0x01 << 26) |
| 54 | #define SSBI_CMD_USE_ENABLE (0x01 << 25) |
| 55 | #define SSBI_CMD_RDWRN (0x01 << 24) |
| 56 | #define SSBI_CMD_REG_ADDR_SHFT (0x10) |
| 57 | #define SSBI_CMD_REG_ADDR_MASK (0xFF << SSBI_CMD_REG_ADDR_SHFT) |
| 58 | #define SSBI_CMD_REG_DATA_SHFT (0x00) |
| 59 | #define SSBI_CMD_REG_DATA_MASK (0xFF << SSBI_CMD_REG_DATA_SHFT) |
| 60 | |
| 61 | /* SSBI_STATUS fields */ |
| 62 | #define SSBI_STATUS_DATA_IN 0x10 |
| 63 | #define SSBI_STATUS_RD_CLOBBERED 0x08 |
| 64 | #define SSBI_STATUS_RD_READY 0x04 |
| 65 | #define SSBI_STATUS_READY 0x02 |
| 66 | #define SSBI_STATUS_MCHN_BUSY 0x01 |
| 67 | |
| 68 | /* SSBI_RD fields */ |
| 69 | #define SSBI_RD_USE_ENABLE 0x02000000 |
| 70 | #define SSBI_RD_RDWRN 0x01000000 |
| 71 | #define SSBI_RD_REG_ADDR_SHFT 0x10 |
| 72 | #define SSBI_RD_REG_ADDR_MASK (0xFF << SSBI_RD_REG_ADDR_SHFT) |
| 73 | #define SSBI_RD_REG_DATA_SHFT (0x00) |
| 74 | #define SSBI_RD_REG_DATA_MASK (0xFF << SSBI_RD_REG_DATA_SHFT) |
| 75 | |
| 76 | /* SSBI_MODE2 fields */ |
| 77 | #define SSBI_MODE2_REG_ADDR_15_8_SHFT 0x04 |
| 78 | #define SSBI_MODE2_REG_ADDR_15_8_MASK (0x7F << SSBI_MODE2_REG_ADDR_15_8_SHFT) |
| 79 | #define SSBI_MODE2_ADDR_WIDTH_SHFT 0x01 |
| 80 | #define SSBI_MODE2_ADDR_WIDTH_MASK (0x07 << SSBI_MODE2_ADDR_WIDTH_SHFT) |
| 81 | #define SSBI_MODE2_SSBI2_MODE 0x00000001 |
| 82 | |
| 83 | //Keypad controller configurations |
| 84 | #define SSBI_REG_KYPD_CNTL_ADDR 0x148 |
| 85 | #define SSBI_REG_KYPD_SCAN_ADDR 0x149 |
| 86 | #define SSBI_REG_KYPD_TEST_ADDR 0x14A |
| 87 | #define SSBI_REG_KYPD_REC_DATA_ADDR 0x14B |
| 88 | #define SSBI_REG_KYPD_OLD_DATA_ADDR 0x14C |
| 89 | |
| 90 | |
| 91 | /* PMIC Arbiter 1: SSBI2 Configuration Micro ARM registers */ |
| 92 | #define PA1_SSBI2_CMD 0x00500000 |
| 93 | #define PA1_SSBI2_RD_STATUS 0x00500004 |
| 94 | |
| 95 | #define PA1_SSBI2_REG_ADDR_SHIFT 8 |
| 96 | #define PA1_SSBI2_CMD_RDWRN_SHIFT 24 |
| 97 | #define PA1_SSBI2_TRANS_DONE_SHIFT 27 |
| 98 | |
| 99 | #define PA1_SSBI2_REG_DATA_MASK 0xFF |
| 100 | #define PA1_SSBI2_REG_DATA_SHIFT 0 |
| 101 | |
| 102 | #define PA1_SSBI2_CMD_READ 1 |
| 103 | #define PA1_SSBI2_CMD_WRITE 0 |
| 104 | |
| 105 | /* PMIC Arbiter 2: SSBI2 Configuration Micro ARM registers */ |
| 106 | #define PA2_SSBI2_CMD 0x00C00000 |
| 107 | #define PA2_SSBI2_RD_STATUS 0x00C00004 |
| 108 | |
| 109 | #define PA2_SSBI2_REG_ADDR_SHIFT 8 |
| 110 | #define PA2_SSBI2_CMD_RDWRN_SHIFT 24 |
| 111 | #define PA2_SSBI2_TRANS_DONE_SHIFT 27 |
| 112 | |
| 113 | #define PA2_SSBI2_REG_DATA_MASK 0xFF |
| 114 | #define PA2_SSBI2_REG_DATA_SHIFT 0 |
| 115 | |
| 116 | #define PA2_SSBI2_CMD_READ 1 |
| 117 | #define PA2_SSBI2_CMD_WRITE 0 |
| 118 | |
| 119 | #define SSBI_CMD_READ(AD) \ |
| 120 | (SSBI_CMD_RDWRN | (((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT)) |
| 121 | |
| 122 | #define SSBI_CMD_WRITE(AD, DT) \ |
| 123 | ((((AD) & 0xFF) << SSBI_CMD_REG_ADDR_SHFT) | \ |
| 124 | (((DT) & 0xFF) << SSBI_CMD_REG_DATA_SHFT)) |
| 125 | |
| 126 | #define SSBI_MODE2_REG_ADDR_15_8(MD, AD) \ |
| 127 | (((MD) & 0x0F) | ((((AD) >> 8) << SSBI_MODE2_REG_ADDR_15_8_SHFT) & \ |
| 128 | SSBI_MODE2_REG_ADDR_15_8_MASK)) |
| 129 | |
| 130 | int i2c_ssbi_read_bytes(unsigned char *buffer, unsigned short length, |
| 131 | unsigned short slave_addr); |
| 132 | int i2c_ssbi_write_bytes(unsigned char *buffer, unsigned short length, |
| 133 | unsigned short slave_addr); |
| 134 | int pa1_ssbi2_read_bytes(unsigned char *buffer, unsigned short length, |
| 135 | unsigned short slave_addr); |
| 136 | int pa1_ssbi2_write_bytes(unsigned char *buffer, unsigned short length, |
| 137 | unsigned short slave_addr); |
| 138 | |
| 139 | #endif |