| * UFS Host driver for Synopsys Designware Core |
| * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com) |
| * Authors: Joao Pinto <jpinto@synopsys.com> |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| /* DWC HC UFSHCI specific Registers */ |
| enum dwc_specific_registers { |
| DWC_UFS_REG_HCLKDIV = 0xFC, |
| /* Clock Divider Values: Hex equivalent of frequency in MHz */ |
| DWC_UFS_REG_HCLKDIV_DIV_62_5 = 0x3e, |
| DWC_UFS_REG_HCLKDIV_DIV_125 = 0x7d, |
| DWC_UFS_REG_HCLKDIV_DIV_200 = 0xc8, |
| #endif /* End of Header */ |