commit | 4dffc4043a392b4a0f13f033330d31833bbf9f35 | [log] [tgz] |
---|---|---|
author | Eugeni Dodonov <eugeni.dodonov@intel.com> | Thu Mar 29 12:32:36 2012 -0300 |
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Mon Apr 09 18:04:04 2012 +0200 |
tree | c09663d2e291b26352eae5dec98982c9c4eefe71 | |
parent | 90e8d31c53890064962f1154405e1034be7ec9a1 [diff] |
drm/i915: add WRPLL clocks The WR PLL can drive the DDI ports at fixed frequencies for HDMI, DVI, DP and FDI. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>