| #include "kona-qrd.dtsi" |
| |
| &qupv3_se13_i2c { |
| status = "ok"; |
| qcom,i2c-touch-active = ""; |
| |
| st_fts@49 { |
| st,x-flip; |
| st,y-flip; |
| }; |
| }; |
| |
| &kona_snd { |
| qcom,msm-mbhc-usbc-audio-supported = <0>; |
| qcom,msm-mbhc-hphl-swh = <1>; |
| qcom,msm-mbhc-gnd-swh = <1>; |
| }; |
| |
| &redriver { |
| status = "disabled"; |
| }; |
| |
| &usb1 { |
| qcom,ignore-wakeup-src-in-hostmode; |
| |
| dwc3@a800000 { |
| dr_mode = "host"; |
| }; |
| }; |
| |
| &usb2_phy0 { |
| qcom,param-override-seq = |
| <0xc7 0x6c |
| 0x03 0x70 |
| 0x03 0x74>; |
| }; |
| |
| &mdm0 { |
| status = "disabled"; |
| }; |
| |
| &qupv3_se1_i2c { |
| status = "ok"; |
| qcom,clk-freq-out = <100000>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| lt9611: lt,lt9611@2b { |
| compatible = "lt,lt9611uxc"; |
| reg = <0x2b>; |
| interrupt-parent = <&tlmm>; |
| interrupts = <1 0>; |
| interrupt-names = "lt_irq"; |
| lt,irq-gpio = <&tlmm 1 0x0>; |
| lt,reset-gpio = <&tlmm 2 0x0>; |
| instance_id = <0>; |
| lt,non-pluggable; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <<9611_pins>; |
| |
| lt,preferred-mode = "1920x1080"; |
| |
| lt,customize-modes { |
| lt,customize-mode-id@0 { |
| lt,mode-h-active = <1920>; |
| lt,mode-h-front-porch = <88>; |
| lt,mode-h-pulse-width = <44>; |
| lt,mode-h-back-porch = <148>; |
| lt,mode-h-active-high; |
| lt,mode-v-active = <1080>; |
| lt,mode-v-front-porch = <4>; |
| lt,mode-v-pulse-width = <5>; |
| lt,mode-v-back-porch = <36>; |
| lt,mode-v-active-high; |
| lt,mode-refresh-rate = <60>; |
| lt,mode-clock-in-khz = <148500>; |
| }; |
| }; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| lt9611_in: endpoint { |
| remote-endpoint = <&ext_dsi_out>; |
| }; |
| }; |
| |
| }; |
| }; |
| }; |
| |
| &sde_dsi { |
| qcom,dsi-default-panel = <&dsi_ext_bridge_1080p>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| ext_dsi_out: endpoint { |
| remote-endpoint = <<9611_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &pcie2 { |
| qcom,boot-option = <0x0>; |
| }; |
| |
| &mhi_0 { |
| reg = <0x100 0x0 0x0 0x0 0x0>; |
| }; |
| |
| &pcie2_rp { |
| #address-cells = <5>; |
| #size-cells = <0>; |
| |
| nvme: nvme { |
| reg = <0 0 0 0 0>; |
| qcom,iommu-group = <&nvme_pci_iommu_group>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| nvme_pci_iommu_group: nvme_pci_iommu_group { |
| qcom,iommu-dma-addr-pool = <0x20000000 0x40000000>; |
| qcom,iommu-dma = "fastmap"; |
| }; |
| }; |
| }; |