arch/arm64/boot/dts/vendor/qcom/sdm660-wcd.dtsi

&slim_aud {
	tasha_codec {
		wsa_spkr_sd1: msm_cdc_pinctrll {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&spkr_1_sd_n_active>;
		      pinctrl-1 = <&spkr_1_sd_n_sleep>;
		};

		wsa_spkr_sd2: msm_cdc_pinctrlr {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&spkr_2_sd_n_active>;
		      pinctrl-1 = <&spkr_2_sd_n_sleep>;
		};

		tasha_hph_en0: msm_cdc_pinctrl_hph_en0 {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&hph_en0_active>;
		      pinctrl-1 = <&hph_en0_sleep>;
		};

		tasha_hph_en1: msm_cdc_pinctrl_hph_en1 {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&hph_en1_active>;
		      pinctrl-1 = <&hph_en1_sleep>;
		};
	};

	tavil_codec {
		wcd: wcd_pinctrl@5 {
			compatible = "qcom,wcd-pinctrl";
			qcom,num-gpios = <5>;
			gpio-controller;
			#gpio-cells = <2>;

			us_euro_sw_wcd_active: us_euro_sw_wcd_active {
				mux {
					pins = "gpio1";
				};

				config {
					pins = "gpio1";
					output-high;
				};
			};

			us_euro_sw_wcd_sleep: us_euro_sw_wcd_sleep {
				mux {
					pins = "gpio1";
				};

				config {
					pins = "gpio1";
					output-low;
				};
			};

			spkr_1_wcd_en_active: spkr_1_wcd_en_active {
				mux {
					pins = "gpio2";
				};

				config {
					pins = "gpio2";
					output-high;
				};
			};

			spkr_1_wcd_en_sleep: spkr_1_wcd_en_sleep {
				mux {
					pins = "gpio2";
				};

				config {
					pins = "gpio2";
					input-enable;
				};
			};

			spkr_2_wcd_en_active: spkr_2_sd_n_active {
				mux {
					pins = "gpio3";
				};

				config {
					pins = "gpio3";
					output-high;
				};
			};

			spkr_2_wcd_en_sleep: spkr_2_sd_n_sleep {
				mux {
					pins = "gpio3";
				};

				config {
					pins = "gpio3";
					input-enable;
				};
			};

			hph_en0_wcd_active: hph_en0_wcd_active {
				mux {
					pins = "gpio4";
				};

				config {
					pins = "gpio4";
					output-high;
				};
			};

			hph_en0_wcd_sleep: hph_en0_wcd_sleep {
				mux {
					pins = "gpio4";
				};

				config {
					pins = "gpio4";
					output-low;
				};
			};

			hph_en1_wcd_active: hph_en1_wcd_active {
				mux {
					pins = "gpio5";
				};

				config {
					pins = "gpio5";
					output-high;
				};
			};

			hph_en1_wcd_sleep: hph_en1_wcd_sleep {
				mux {
					pins = "gpio5";
				};

				config {
					pins = "gpio5";
					output-low;
				};
			};
		};

		wsa_spkr_wcd_sd1: msm_cdc_pinctrll {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&spkr_1_wcd_en_active>;
		      pinctrl-1 = <&spkr_1_wcd_en_sleep>;
		};

		wsa_spkr_wcd_sd2: msm_cdc_pinctrlr {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&spkr_2_wcd_en_active>;
		      pinctrl-1 = <&spkr_2_wcd_en_sleep>;
		};

		tavil_us_euro_sw: msm_cdc_pinctrl_us_euro_sw {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&us_euro_sw_wcd_active>;
		      pinctrl-1 = <&us_euro_sw_wcd_sleep>;
		};

		tavil_hph_en0: msm_cdc_pinctrl_hph_en0 {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&hph_en0_wcd_active>;
		      pinctrl-1 = <&hph_en0_wcd_sleep>;
		};

		tavil_hph_en1: msm_cdc_pinctrl_hph_en1 {
		      compatible = "qcom,msm-cdc-pinctrl";
		      pinctrl-names = "aud_active", "aud_sleep";
		      pinctrl-0 = <&hph_en1_wcd_active>;
		      pinctrl-1 = <&hph_en1_wcd_sleep>;
		};
	};
};