commit | c75724d1747230abdd37d0594ac5277b867befd4 | [log] [tgz] |
---|---|---|
author | Luis R. Rodriguez <lrodriguez@atheros.com> | Mon Oct 19 02:33:34 2009 -0400 |
committer | John W. Linville <linville@tuxdriver.com> | Fri Oct 30 16:50:36 2009 -0400 |
tree | 76ba22226b25c46ed01016f33ce72b793d7ec3cf | |
parent | 8564328d85f69121744d8337124857a2e726239b [diff] |
ath9k_hw: change the way we initialize the pll for ar9271 We adjust the core clock for ar9271 to 117 MHz; this also requires us to adjust the baud divider based on the targetted baud rate. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>