| Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding |
| -------------------------------------------------------------------- |
| |
| Required properties : |
| - compatible: shall contain one of the following: |
| "qcom,gpucc-kona" |
| "qcom,gpucc-lito". |
| - reg: shall contain base register offset and size. |
| - reg-names: names of registers listed in the same order as in the reg property. |
| Must contain "cc_base". |
| - #clock-cells: from common clock binding, shall contain 1. |
| - #reset-cells: from common reset binding, shall contain 1. |
| - vdd_cx-supply: The vdd_cx logic rail supply. |
| - vdd_mx-supply: The vdd_mx logic rail supply. |
| |
| Optional properties : |
| - #power-domain-cells : from generic power domain binding, shall contain 1. |
| |
| Example: |
| |
| clock_gpucc: clock-controller@3d90000 { |
| compatible = "qcom,gpucc-kona"; |
| reg = <0x3d90000 0x9000>; |
| reg-names = "cc_base"; |
| vdd_cx-supply = <&VDD_CX_LEVEL>; |
| vdd_mx-supply = <&VDD_MX_LEVEL>; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| }; |
| |