| / { |
| mbus@f1000000 { |
| pciec: pcie@82000000 { |
| compatible = "marvell,kirkwood-pcie"; |
| status = "disabled"; |
| device_type = "pci"; |
| |
| #address-cells = <3>; |
| #size-cells = <2>; |
| |
| bus-range = <0x00 0xff>; |
| |
| ranges = |
| <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 |
| 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ |
| 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; |
| |
| pcie0: pcie@1,0 { |
| device_type = "pci"; |
| assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; |
| reg = <0x0800 0 0 0 0>; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| #interrupt-cells = <1>; |
| ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 |
| 0x81000000 0 0 0x81000000 0x1 0 1 0>; |
| bus-range = <0x00 0xff>; |
| interrupt-map-mask = <0 0 0 0>; |
| interrupt-map = <0 0 0 0 &intc 9>; |
| marvell,pcie-port = <0>; |
| marvell,pcie-lane = <0>; |
| clocks = <&gate_clk 2>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| |
| ocp@f1000000 { |
| pinctrl: pin-controller@10000 { |
| compatible = "marvell,98dx4122-pinctrl"; |
| |
| }; |
| }; |
| }; |
| |
| &sata_phy0 { |
| status = "disabled"; |
| }; |
| |
| &sata_phy1 { |
| status = "disabled"; |
| }; |