Documentation/devicetree/bindings/thermal/exynos-thermal.txt

* Exynos Thermal Management Unit (TMU)

** Required properties:

- compatible : One of the following:
	       "samsung,exynos3250-tmu"
	       "samsung,exynos4412-tmu"
	       "samsung,exynos4210-tmu"
	       "samsung,exynos5250-tmu"
	       "samsung,exynos5260-tmu"
	       "samsung,exynos5420-tmu" for TMU channel 0, 1 on Exynos5420
	       "samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4
			Exynos5420 (Must pass triminfo base and triminfo clock)
               "samsung,exynos5433-tmu"
	       "samsung,exynos5440-tmu"
	       "samsung,exynos7-tmu"
- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
	instances of TMU and some registers are shared across all TMU's like
	interrupt related then 2 set of register has to supplied. First set
	belongs	to register set of TMU instance and second set belongs to
	registers shared with the TMU instance.

  NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
	channels 2, 3 and 4
	Use "samsung,exynos5420-tmu-ext-triminfo" in cases, there is a misplaced
	register, also provide clock to access that base.

	TRIMINFO at 0x1006c000 contains data for TMU channel 3
	TRIMINFO at 0x100a0000 contains data for TMU channel 4
	TRIMINFO at 0x10068000 contains data for TMU channel 2

- interrupts : Should contain interrupt for thermal system
- clocks : The main clocks for TMU device
	-- 1. operational clock for TMU channel
	-- 2. optional clock to access the shared registers of TMU channel
	-- 3. optional special clock for functional operation
- clock-names : Thermal system clock name
	-- "tmu_apbif" operational clock for current TMU channel
	-- "tmu_triminfo_apbif" clock to access the shared triminfo register
		for current TMU channel
	-- "tmu_sclk" clock for functional operation of the current TMU
		channel

The Exynos TMU supports generating interrupts when reaching given
temperature thresholds. Number of supported thermal trip points depends
on the SoC (only first trip points defined in DT will be configured):
 - most of SoC: 4
 - samsung,exynos5433-tmu: 8
 - samsung,exynos7-tmu: 8

** Optional properties:

- vtmu-supply: This entry is optional and provides the regulator node supplying
		voltage to TMU. If needed this entry can be placed inside
		board/platform specific dts file.

Example 1):

	tmu@100c0000 {
		compatible = "samsung,exynos4412-tmu";
		interrupt-parent = <&combiner>;
		reg = <0x100C0000 0x100>;
		interrupts = <2 4>;
		clocks = <&clock 383>;
		clock-names = "tmu_apbif";
		vtmu-supply = <&tmu_regulator_node>;
		#thermal-sensor-cells = <0>;
	};

Example 2):

	tmuctrl_0: tmuctrl@160118 {
		compatible = "samsung,exynos5440-tmu";
		reg = <0x160118 0x230>, <0x160368 0x10>;
		interrupts = <0 58 0>;
		clocks = <&clock 21>;
		clock-names = "tmu_apbif";
		#thermal-sensor-cells = <0>;
	};

Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
	tmu_cpu2: tmu@10068000 {
		compatible = "samsung,exynos5420-tmu-ext-triminfo";
		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
		interrupts = <0 184 0>;
		clocks = <&clock 318>, <&clock 318>;
		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
		#thermal-sensor-cells = <0>;
	};

	tmu_cpu3: tmu@1006c000 {
		compatible = "samsung,exynos5420-tmu-ext-triminfo";
		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
		interrupts = <0 185 0>;
		clocks = <&clock 318>, <&clock 319>;
		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
		#thermal-sensor-cells = <0>;
	};

	tmu_gpu: tmu@100a0000 {
		compatible = "samsung,exynos5420-tmu-ext-triminfo";
		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
		interrupts = <0 215 0>;
		clocks = <&clock 319>, <&clock 318>;
		clock-names = "tmu_apbif", "tmu_triminfo_apbif";
		#thermal-sensor-cells = <0>;
	};

Note: For multi-instance tmu each instance should have an alias correctly
numbered in "aliases" node.

Example:

aliases {
	tmuctrl0 = &tmuctrl_0;
	tmuctrl1 = &tmuctrl_1;
	tmuctrl2 = &tmuctrl_2;
};