arch/arm/boot/dts/imx6q-sabresd.dts

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/dts-v1/;
/include/ "imx6q.dtsi"

/ {
	model = "Freescale i.MX6Q SABRE Smart Device Board";
	compatible = "fsl,imx6q-sabresd", "fsl,imx6q";

	memory {
		reg = <0x10000000 0x40000000>;
	};

	soc {
		aips-bus@02000000 { /* AIPS1 */
			spba-bus@02000000 {
				uart1: serial@02020000 {
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_uart1_1>;
					status = "okay";
				};
			};

			iomuxc@020e0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_hog>;

				hog {
					pinctrl_hog: hoggrp {
						fsl,pins = <
							1402 0x80000000	/* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
							1410 0x80000000	/* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
							1418 0x80000000	/* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
							1426 0x80000000	/* MX6Q_PAD_NANDF_D3__GPIO_2_3 */
						>;
					};
				};
			};
		};

		aips-bus@02100000 { /* AIPS2 */
			ethernet@02188000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_enet_1>;
				phy-mode = "rgmii";
				status = "okay";
			};

			usdhc@02194000 { /* uSDHC2 */
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usdhc2_1>;
				cd-gpios = <&gpio2 2 0>;
				wp-gpios = <&gpio2 3 0>;
				status = "okay";
			};

			usdhc@02198000 { /* uSDHC3 */
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usdhc3_1>;
				cd-gpios = <&gpio2 0 0>;
				wp-gpios = <&gpio2 1 0>;
				status = "okay";
			};
		};
	};
};