| /* |
| * Device Tree Source for the SILK board |
| * |
| * Copyright (C) 2014 Renesas Electronics Corporation |
| * Copyright (C) 2014-2015 Renesas Solutions Corp. |
| * Copyright (C) 2014-2015 Cogent Embedded, Inc. |
| * |
| * This file is licensed under the terms of the GNU General Public License |
| * version 2. This program is licensed "as is" without any warranty of any |
| * kind, whether express or implied. |
| */ |
| |
| /dts-v1/; |
| #include "r8a7794.dtsi" |
| #include <dt-bindings/gpio/gpio.h> |
| |
| / { |
| model = "SILK"; |
| compatible = "renesas,silk", "renesas,r8a7794"; |
| |
| aliases { |
| serial0 = &scif2; |
| }; |
| |
| chosen { |
| bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@40000000 { |
| device_type = "memory"; |
| reg = <0 0x40000000 0 0x40000000>; |
| }; |
| |
| d3_3v: regulator@0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "D3.3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vcc_sdhi1: regulator@3 { |
| compatible = "regulator-fixed"; |
| |
| regulator-name = "SDHI1 Vcc"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| vccq_sdhi1: regulator@4 { |
| compatible = "regulator-gpio"; |
| |
| regulator-name = "SDHI1 VccQ"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; |
| gpios-states = <1>; |
| states = <3300000 1 |
| 1800000 0>; |
| }; |
| }; |
| |
| &extal_clk { |
| clock-frequency = <20000000>; |
| }; |
| |
| &pfc { |
| scif2_pins: serial2 { |
| renesas,groups = "scif2_data"; |
| renesas,function = "scif2"; |
| }; |
| |
| ether_pins: ether { |
| renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; |
| renesas,function = "eth"; |
| }; |
| |
| phy1_pins: phy1 { |
| renesas,groups = "intc_irq8"; |
| renesas,function = "intc"; |
| }; |
| |
| i2c1_pins: i2c1 { |
| renesas,groups = "i2c1"; |
| renesas,function = "i2c1"; |
| }; |
| |
| mmcif0_pins: mmcif0 { |
| renesas,groups = "mmc_data8", "mmc_ctrl"; |
| renesas,function = "mmc"; |
| }; |
| |
| sdhi1_pins: sd1 { |
| renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; |
| renesas,function = "sdhi1"; |
| }; |
| |
| qspi_pins: spi0 { |
| renesas,groups = "qspi_ctrl", "qspi_data4"; |
| renesas,function = "qspi"; |
| }; |
| |
| vin0_pins: vin0 { |
| renesas,groups = "vin0_data8", "vin0_clk"; |
| renesas,function = "vin0"; |
| }; |
| |
| usb0_pins: usb0 { |
| renesas,groups = "usb0"; |
| renesas,function = "usb0"; |
| }; |
| |
| usb1_pins: usb1 { |
| renesas,groups = "usb1"; |
| renesas,function = "usb1"; |
| }; |
| }; |
| |
| &scif2 { |
| pinctrl-0 = <&scif2_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| ðer { |
| pinctrl-0 = <ðer_pins &phy1_pins>; |
| pinctrl-names = "default"; |
| |
| phy-handle = <&phy1>; |
| renesas,ether-link-active-low; |
| status = "okay"; |
| |
| phy1: ethernet-phy@1 { |
| reg = <1>; |
| interrupt-parent = <&irqc0>; |
| interrupts = <8 IRQ_TYPE_LEVEL_LOW>; |
| micrel,led-mode = <1>; |
| }; |
| }; |
| |
| &i2c1 { |
| pinctrl-0 = <&i2c1_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| composite-in@20 { |
| compatible = "adi,adv7180"; |
| reg = <0x20>; |
| remote = <&vin0>; |
| |
| port { |
| adv7180: endpoint { |
| bus-width = <8>; |
| remote-endpoint = <&vin0ep>; |
| }; |
| }; |
| }; |
| }; |
| |
| &mmcif0 { |
| pinctrl-0 = <&mmcif0_pins>; |
| pinctrl-names = "default"; |
| |
| vmmc-supply = <&d3_3v>; |
| vqmmc-supply = <&d3_3v>; |
| bus-width = <8>; |
| non-removable; |
| status = "okay"; |
| }; |
| |
| &sdhi1 { |
| pinctrl-0 = <&sdhi1_pins>; |
| pinctrl-names = "default"; |
| |
| vmmc-supply = <&vcc_sdhi1>; |
| vqmmc-supply = <&vccq_sdhi1>; |
| cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &qspi { |
| pinctrl-0 = <&qspi_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| |
| flash@0 { |
| compatible = "spansion,s25fl512s", "jedec,spi-nor"; |
| reg = <0>; |
| spi-max-frequency = <30000000>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| spi-cpol; |
| spi-cpha; |
| m25p,fast-read; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| partition@0 { |
| label = "loader"; |
| reg = <0x00000000 0x00040000>; |
| read-only; |
| }; |
| partition@40000 { |
| label = "user"; |
| reg = <0x00040000 0x00400000>; |
| read-only; |
| }; |
| partition@440000 { |
| label = "flash"; |
| reg = <0x00440000 0x03bc0000>; |
| }; |
| }; |
| }; |
| }; |
| |
| /* composite video input */ |
| &vin0 { |
| status = "okay"; |
| pinctrl-0 = <&vin0_pins>; |
| pinctrl-names = "default"; |
| |
| port { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| vin0ep: endpoint { |
| remote-endpoint = <&adv7180>; |
| bus-width = <8>; |
| }; |
| }; |
| }; |
| |
| &pci0 { |
| status = "okay"; |
| pinctrl-0 = <&usb0_pins>; |
| pinctrl-names = "default"; |
| }; |
| |
| &pci1 { |
| status = "okay"; |
| pinctrl-0 = <&usb1_pins>; |
| pinctrl-names = "default"; |
| }; |
| |
| &usbphy { |
| status = "okay"; |
| }; |