Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef __SPARC_PCI_H |
| 2 | #define __SPARC_PCI_H |
| 3 | |
| 4 | #ifdef __KERNEL__ |
| 5 | |
| 6 | /* Can be used to override the logic in pci_scan_bus for skipping |
| 7 | * already-configured bus numbers - to be used for buggy BIOSes |
| 8 | * or architectures with incomplete PCI setup by the loader. |
| 9 | */ |
| 10 | #define pcibios_assign_all_busses() 0 |
| 11 | #define pcibios_scan_all_fns(a, b) 0 |
| 12 | |
| 13 | #define PCIBIOS_MIN_IO 0UL |
| 14 | #define PCIBIOS_MIN_MEM 0UL |
| 15 | |
| 16 | #define PCI_IRQ_NONE 0xffffffff |
| 17 | |
| 18 | extern inline void pcibios_set_master(struct pci_dev *dev) |
| 19 | { |
| 20 | /* No special bus mastering setup handling */ |
| 21 | } |
| 22 | |
David Shaohua Li | c9c3e45 | 2005-04-01 00:07:31 -0500 | [diff] [blame] | 23 | extern inline void pcibios_penalize_isa_irq(int irq, int active) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | { |
| 25 | /* We don't do dynamic PCI IRQ allocation */ |
| 26 | } |
| 27 | |
| 28 | /* Dynamic DMA mapping stuff. |
| 29 | */ |
| 30 | #define PCI_DMA_BUS_IS_PHYS (0) |
| 31 | |
| 32 | #include <asm/scatterlist.h> |
| 33 | |
| 34 | struct pci_dev; |
| 35 | |
| 36 | /* Allocate and map kernel buffer using consistent mode DMA for a device. |
| 37 | * hwdev should be valid struct pci_dev pointer for PCI devices. |
| 38 | */ |
| 39 | extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); |
| 40 | |
| 41 | /* Free and unmap a consistent DMA buffer. |
| 42 | * cpu_addr is what was returned from pci_alloc_consistent, |
| 43 | * size must be the same as what as passed into pci_alloc_consistent, |
| 44 | * and likewise dma_addr must be the same as what *dma_addrp was set to. |
| 45 | * |
| 46 | * References to the memory and mappings assosciated with cpu_addr/dma_addr |
| 47 | * past this call are illegal. |
| 48 | */ |
| 49 | extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); |
| 50 | |
| 51 | /* Map a single buffer of the indicated size for DMA in streaming mode. |
| 52 | * The 32-bit bus address to use is returned. |
| 53 | * |
| 54 | * Once the device is given the dma address, the device owns this memory |
| 55 | * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. |
| 56 | */ |
| 57 | extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction); |
| 58 | |
| 59 | /* Unmap a single streaming mode DMA translation. The dma_addr and size |
| 60 | * must match what was provided for in a previous pci_map_single call. All |
| 61 | * other usages are undefined. |
| 62 | * |
| 63 | * After this call, reads by the cpu to the buffer are guaranteed to see |
| 64 | * whatever the device wrote there. |
| 65 | */ |
| 66 | extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction); |
| 67 | |
| 68 | /* pci_unmap_{single,page} is not a nop, thus... */ |
| 69 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ |
| 70 | dma_addr_t ADDR_NAME; |
| 71 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ |
| 72 | __u32 LEN_NAME; |
| 73 | #define pci_unmap_addr(PTR, ADDR_NAME) \ |
| 74 | ((PTR)->ADDR_NAME) |
| 75 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ |
| 76 | (((PTR)->ADDR_NAME) = (VAL)) |
| 77 | #define pci_unmap_len(PTR, LEN_NAME) \ |
| 78 | ((PTR)->LEN_NAME) |
| 79 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ |
| 80 | (((PTR)->LEN_NAME) = (VAL)) |
| 81 | |
| 82 | /* |
| 83 | * Same as above, only with pages instead of mapped addresses. |
| 84 | */ |
| 85 | extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, |
| 86 | unsigned long offset, size_t size, int direction); |
| 87 | extern void pci_unmap_page(struct pci_dev *hwdev, |
| 88 | dma_addr_t dma_address, size_t size, int direction); |
| 89 | |
| 90 | /* Map a set of buffers described by scatterlist in streaming |
| 91 | * mode for DMA. This is the scather-gather version of the |
| 92 | * above pci_map_single interface. Here the scatter gather list |
| 93 | * elements are each tagged with the appropriate dma address |
| 94 | * and length. They are obtained via sg_dma_{address,length}(SG). |
| 95 | * |
| 96 | * NOTE: An implementation may be able to use a smaller number of |
| 97 | * DMA address/length pairs than there are SG table elements. |
| 98 | * (for example via virtual mapping capabilities) |
| 99 | * The routine returns the number of addr/length pairs actually |
| 100 | * used, at most nents. |
| 101 | * |
| 102 | * Device ownership issues as mentioned above for pci_map_single are |
| 103 | * the same here. |
| 104 | */ |
| 105 | extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction); |
| 106 | |
| 107 | /* Unmap a set of streaming mode DMA translations. |
| 108 | * Again, cpu read rules concerning calls here are the same as for |
| 109 | * pci_unmap_single() above. |
| 110 | */ |
| 111 | extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction); |
| 112 | |
| 113 | /* Make physical memory consistent for a single |
| 114 | * streaming mode DMA translation after a transfer. |
| 115 | * |
| 116 | * If you perform a pci_map_single() but wish to interrogate the |
| 117 | * buffer using the cpu, yet do not wish to teardown the PCI dma |
| 118 | * mapping, you must call this function before doing so. At the |
| 119 | * next point you give the PCI dma address back to the card, you |
| 120 | * must first perform a pci_dma_sync_for_device, and then the device |
| 121 | * again owns the buffer. |
| 122 | */ |
| 123 | extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); |
| 124 | extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); |
| 125 | |
| 126 | /* Make physical memory consistent for a set of streaming |
| 127 | * mode DMA translations after a transfer. |
| 128 | * |
| 129 | * The same as pci_dma_sync_single_* but for a scatter-gather list, |
| 130 | * same rules and usage. |
| 131 | */ |
| 132 | extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); |
| 133 | extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); |
| 134 | |
| 135 | /* Return whether the given PCI device DMA address mask can |
| 136 | * be supported properly. For example, if your device can |
| 137 | * only drive the low 24-bits during PCI bus mastering, then |
| 138 | * you would pass 0x00ffffff as the mask to this function. |
| 139 | */ |
| 140 | extern inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) |
| 141 | { |
| 142 | return 1; |
| 143 | } |
| 144 | |
| 145 | #define pci_dac_dma_supported(dev, mask) (0) |
| 146 | |
Andrew Morton | bb4a61b | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 147 | #ifdef CONFIG_PCI |
David S. Miller | e24c2d9 | 2005-06-02 12:55:50 -0700 | [diff] [blame] | 148 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
| 149 | enum pci_dma_burst_strategy *strat, |
| 150 | unsigned long *strategy_parameter) |
| 151 | { |
| 152 | *strat = PCI_DMA_BURST_INFINITY; |
| 153 | *strategy_parameter = ~0UL; |
| 154 | } |
Andrew Morton | bb4a61b | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 155 | #endif |
David S. Miller | e24c2d9 | 2005-06-02 12:55:50 -0700 | [diff] [blame] | 156 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | static inline void pcibios_add_platform_entries(struct pci_dev *dev) |
| 158 | { |
| 159 | } |
| 160 | |
| 161 | #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) |
| 162 | |
| 163 | static inline int pci_dma_mapping_error(dma_addr_t dma_addr) |
| 164 | { |
| 165 | return (dma_addr == PCI_DMA_ERROR_CODE); |
| 166 | } |
| 167 | |
| 168 | #endif /* __KERNEL__ */ |
| 169 | |
| 170 | /* generic pci stuff */ |
| 171 | #include <asm-generic/pci.h> |
| 172 | |
| 173 | #endif /* __SPARC_PCI_H */ |