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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-sh/cpu-sh4/freq.h
3 *
4 * Copyright (C) 2002, 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_CPU_SH4_FREQ_H
11#define __ASM_CPU_SH4_FREQ_H
12
Paul Mundt178dd0c2008-04-09 17:56:18 +090013#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \
14 defined(CONFIG_CPU_SUBTYPE_SH7723) || \
Yoshihiro Shimodaa4e1d082008-07-07 21:11:51 +090015 defined(CONFIG_CPU_SUBTYPE_SH7343) || \
Paul Mundt178dd0c2008-04-09 17:56:18 +090016 defined(CONFIG_CPU_SUBTYPE_SH7366)
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#define FRQCR 0xa4150000
dmitry pervushin1929cb32007-04-24 13:39:09 +090018#define VCLKCR 0xa4150004
19#define SCLKACR 0xa4150008
20#define SCLKBCR 0xa415000c
21#define IrDACLKCR 0xa4150010
Magnus Dammaea167c2008-07-17 18:56:15 +090022#define MSTPCR0 0xa4150030
23#define MSTPCR1 0xa4150034
24#define MSTPCR2 0xa4150038
Yoshihiro Shimoda7d740a02008-01-07 14:40:07 +090025#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
26 defined(CONFIG_CPU_SUBTYPE_SH7780)
Paul Mundt36ddf312006-01-16 22:14:17 -080027#define FRQCR 0xffc80000
Kuninori Morimoto0207a2e2009-04-16 14:40:56 +090028#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
29#define FRQCRA 0xa4150000
30#define FRQCRB 0xa4150004
31#define VCLKCR 0xa4150048
32
33#define FCLKACR 0xa4150008
34#define FCLKBCR 0xa415000c
35#define FRQCR FRQCRA
36#define SCLKACR FCLKACR
37#define SCLKBCR FCLKBCR
38#define FCLKACR 0xa4150008
39#define FCLKBCR 0xa415000c
40#define IrDACLKCR 0xa4150018
41
42#define MSTPCR0 0xa4150030
43#define MSTPCR1 0xa4150034
44#define MSTPCR2 0xa4150038
45
Paul Mundt32351a22007-03-12 14:38:59 +090046#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
47#define FRQCR0 0xffc80000
48#define FRQCR1 0xffc80004
49#define FRQMR1 0xffc80014
Kuninori Morimoto55ba99e2009-03-03 15:40:25 +090050#elif defined(CONFIG_CPU_SUBTYPE_SH7786)
51#define FRQCR0 0xffc40000
52#define FRQCR1 0xffc40004
53#define FRQMR1 0xffc40014
Paul Mundt2b1bd1a2007-06-20 18:27:10 +090054#elif defined(CONFIG_CPU_SUBTYPE_SHX3)
55#define FRQCR 0xffc00014
Linus Torvalds1da177e2005-04-16 15:20:36 -070056#else
57#define FRQCR 0xffc00000
Evgeniy Polyakov66c52272007-05-31 13:46:21 +090058#define FRQCR_PSTBY 0x0200
59#define FRQCR_PLLEN 0x0400
60#define FRQCR_CKOEN 0x0800
Linus Torvalds1da177e2005-04-16 15:20:36 -070061#endif
62#define MIN_DIVISOR_NR 0
63#define MAX_DIVISOR_NR 3
64
65#endif /* __ASM_CPU_SH4_FREQ_H */
66