| Stefan Popa | 0357e48 | 2018-04-11 14:53:17 +0300 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * This file is part of AD5686 DAC driver |
| 4 | * |
| 5 | * Copyright 2018 Analog Devices Inc. |
| 6 | */ |
| 7 | |
| 8 | #ifndef __DRIVERS_IIO_DAC_AD5686_H__ |
| 9 | #define __DRIVERS_IIO_DAC_AD5686_H__ |
| 10 | |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/cache.h> |
| 13 | #include <linux/mutex.h> |
| 14 | #include <linux/kernel.h> |
| 15 | |
| 16 | #define AD5686_ADDR(x) ((x) << 16) |
| 17 | #define AD5686_CMD(x) ((x) << 20) |
| 18 | |
| 19 | #define AD5686_ADDR_DAC(chan) (0x1 << (chan)) |
| 20 | #define AD5686_ADDR_ALL_DAC 0xF |
| 21 | |
| 22 | #define AD5686_CMD_NOOP 0x0 |
| 23 | #define AD5686_CMD_WRITE_INPUT_N 0x1 |
| 24 | #define AD5686_CMD_UPDATE_DAC_N 0x2 |
| 25 | #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3 |
| 26 | #define AD5686_CMD_POWERDOWN_DAC 0x4 |
| 27 | #define AD5686_CMD_LDAC_MASK 0x5 |
| 28 | #define AD5686_CMD_RESET 0x6 |
| 29 | #define AD5686_CMD_INTERNAL_REFER_SETUP 0x7 |
| 30 | #define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8 |
| 31 | #define AD5686_CMD_READBACK_ENABLE 0x9 |
| 32 | |
| 33 | #define AD5686_LDAC_PWRDN_NONE 0x0 |
| 34 | #define AD5686_LDAC_PWRDN_1K 0x1 |
| 35 | #define AD5686_LDAC_PWRDN_100K 0x2 |
| 36 | #define AD5686_LDAC_PWRDN_3STATE 0x3 |
| 37 | |
| 38 | /** |
| 39 | * ad5686_supported_device_ids: |
| 40 | */ |
| 41 | enum ad5686_supported_device_ids { |
| 42 | ID_AD5672R, |
| 43 | ID_AD5676, |
| 44 | ID_AD5676R, |
| 45 | ID_AD5684, |
| 46 | ID_AD5684R, |
| 47 | ID_AD5685R, |
| 48 | ID_AD5686, |
| 49 | ID_AD5686R, |
| 50 | }; |
| 51 | |
| 52 | struct ad5686_state; |
| 53 | |
| 54 | typedef int (*ad5686_write_func)(struct ad5686_state *st, |
| 55 | u8 cmd, u8 addr, u16 val); |
| 56 | |
| 57 | typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr); |
| 58 | |
| 59 | /** |
| 60 | * struct ad5686_chip_info - chip specific information |
| 61 | * @int_vref_mv: AD5620/40/60: the internal reference voltage |
| 62 | * @num_channels: number of channels |
| 63 | * @channel: channel specification |
| 64 | */ |
| 65 | |
| 66 | struct ad5686_chip_info { |
| 67 | u16 int_vref_mv; |
| 68 | unsigned int num_channels; |
| 69 | struct iio_chan_spec *channels; |
| 70 | }; |
| 71 | |
| 72 | /** |
| 73 | * struct ad5446_state - driver instance specific data |
| 74 | * @spi: spi_device |
| 75 | * @chip_info: chip model specific constants, available modes etc |
| 76 | * @reg: supply regulator |
| 77 | * @vref_mv: actual reference voltage used |
| 78 | * @pwr_down_mask: power down mask |
| 79 | * @pwr_down_mode: current power down mode |
| 80 | * @data: spi transfer buffers |
| 81 | */ |
| 82 | |
| 83 | struct ad5686_state { |
| 84 | struct device *dev; |
| 85 | const struct ad5686_chip_info *chip_info; |
| 86 | struct regulator *reg; |
| 87 | unsigned short vref_mv; |
| 88 | unsigned int pwr_down_mask; |
| 89 | unsigned int pwr_down_mode; |
| 90 | ad5686_write_func write; |
| 91 | ad5686_read_func read; |
| 92 | |
| 93 | /* |
| 94 | * DMA (thus cache coherency maintenance) requires the |
| 95 | * transfer buffers to live in their own cache lines. |
| 96 | */ |
| 97 | |
| 98 | union { |
| 99 | __be32 d32; |
| 100 | __be16 d16; |
| 101 | u8 d8[4]; |
| 102 | } data[3] ____cacheline_aligned; |
| 103 | }; |
| 104 | |
| 105 | |
| 106 | int ad5686_probe(struct device *dev, |
| 107 | enum ad5686_supported_device_ids chip_type, |
| 108 | const char *name, ad5686_write_func write, |
| 109 | ad5686_read_func read); |
| 110 | |
| 111 | int ad5686_remove(struct device *dev); |
| 112 | |
| 113 | |
| 114 | #endif /* __DRIVERS_IIO_DAC_AD5686_H__ */ |