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Michael Büscheea977e2012-04-02 12:14:32 -03001/*
2 * Fitipower FC0011 tuner driver
3 *
4 * Copyright (C) 2012 Michael Buesch <m@bues.ch>
5 *
6 * Derived from FC0012 tuner driver:
7 * Copyright (C) 2012 Hans-Frieder Vogt <hfvogt@gmx.net>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include "fc0011.h"
25
26
27/* Tuner registers */
28enum {
29 FC11_REG_0,
30 FC11_REG_FA, /* FA */
31 FC11_REG_FP, /* FP */
32 FC11_REG_XINHI, /* XIN high 8 bit */
33 FC11_REG_XINLO, /* XIN low 8 bit */
34 FC11_REG_VCO, /* VCO */
35 FC11_REG_VCOSEL, /* VCO select */
36 FC11_REG_7, /* Unknown tuner reg 7 */
37 FC11_REG_8, /* Unknown tuner reg 8 */
38 FC11_REG_9,
39 FC11_REG_10, /* Unknown tuner reg 10 */
40 FC11_REG_11, /* Unknown tuner reg 11 */
41 FC11_REG_12,
42 FC11_REG_RCCAL, /* RC calibrate */
43 FC11_REG_VCOCAL, /* VCO calibrate */
44 FC11_REG_15,
45 FC11_REG_16, /* Unknown tuner reg 16 */
46 FC11_REG_17,
47
48 FC11_NR_REGS, /* Number of registers */
49};
50
51enum FC11_REG_VCOSEL_bits {
52 FC11_VCOSEL_2 = 0x08, /* VCO select 2 */
53 FC11_VCOSEL_1 = 0x10, /* VCO select 1 */
54 FC11_VCOSEL_CLKOUT = 0x20, /* Fix clock out */
55 FC11_VCOSEL_BW7M = 0x40, /* 7MHz bw */
56 FC11_VCOSEL_BW6M = 0x80, /* 6MHz bw */
57};
58
59enum FC11_REG_RCCAL_bits {
60 FC11_RCCAL_FORCE = 0x10, /* force */
61};
62
63enum FC11_REG_VCOCAL_bits {
64 FC11_VCOCAL_RUN = 0, /* VCO calibration run */
65 FC11_VCOCAL_VALUEMASK = 0x3F, /* VCO calibration value mask */
66 FC11_VCOCAL_OK = 0x40, /* VCO calibration Ok */
67 FC11_VCOCAL_RESET = 0x80, /* VCO calibration reset */
68};
69
70
71struct fc0011_priv {
72 struct i2c_adapter *i2c;
73 u8 addr;
74
75 u32 frequency;
76 u32 bandwidth;
77};
78
79
80static int fc0011_writereg(struct fc0011_priv *priv, u8 reg, u8 val)
81{
82 u8 buf[2] = { reg, val };
83 struct i2c_msg msg = { .addr = priv->addr,
84 .flags = 0, .buf = buf, .len = 2 };
85
86 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
87 dev_err(&priv->i2c->dev,
88 "I2C write reg failed, reg: %02x, val: %02x\n",
89 reg, val);
90 return -EIO;
91 }
92
93 return 0;
94}
95
96static int fc0011_readreg(struct fc0011_priv *priv, u8 reg, u8 *val)
97{
98 u8 dummy;
99 struct i2c_msg msg[2] = {
100 { .addr = priv->addr,
101 .flags = 0, .buf = &reg, .len = 1 },
102 { .addr = priv->addr,
103 .flags = I2C_M_RD, .buf = val ? : &dummy, .len = 1 },
104 };
105
106 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
107 dev_err(&priv->i2c->dev,
108 "I2C read failed, reg: %02x\n", reg);
109 return -EIO;
110 }
111
112 return 0;
113}
114
115static int fc0011_release(struct dvb_frontend *fe)
116{
117 kfree(fe->tuner_priv);
118 fe->tuner_priv = NULL;
119
120 return 0;
121}
122
123static int fc0011_init(struct dvb_frontend *fe)
124{
125 struct fc0011_priv *priv = fe->tuner_priv;
126 int err;
127
128 if (WARN_ON(!fe->callback))
129 return -EINVAL;
130
131 err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
132 FC0011_FE_CALLBACK_POWER, priv->addr);
133 if (err) {
134 dev_err(&priv->i2c->dev, "Power-on callback failed\n");
135 return err;
136 }
137 err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
138 FC0011_FE_CALLBACK_RESET, priv->addr);
139 if (err) {
140 dev_err(&priv->i2c->dev, "Reset callback failed\n");
141 return err;
142 }
143
144 return 0;
145}
146
147/* Initiate VCO calibration */
148static int fc0011_vcocal_trigger(struct fc0011_priv *priv)
149{
150 int err;
151
152 err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RESET);
153 if (err)
154 return err;
155 err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN);
156 if (err)
157 return err;
158
159 return 0;
160}
161
162/* Read VCO calibration value */
163static int fc0011_vcocal_read(struct fc0011_priv *priv, u8 *value)
164{
165 int err;
166
167 err = fc0011_writereg(priv, FC11_REG_VCOCAL, FC11_VCOCAL_RUN);
168 if (err)
169 return err;
Michael Büschc421d5c2012-04-03 05:08:45 -0300170 usleep_range(10000, 20000);
Michael Büscheea977e2012-04-02 12:14:32 -0300171 err = fc0011_readreg(priv, FC11_REG_VCOCAL, value);
172 if (err)
173 return err;
174
175 return 0;
176}
177
178static int fc0011_set_params(struct dvb_frontend *fe)
179{
180 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
181 struct fc0011_priv *priv = fe->tuner_priv;
182 int err;
183 unsigned int i, vco_retries;
184 u32 freq = p->frequency / 1000;
185 u32 bandwidth = p->bandwidth_hz / 1000;
Michael Büsch03a497d2013-02-07 12:16:55 -0300186 u32 fvco, xin, frac, xdiv, xdivr;
Michael Büscheea977e2012-04-02 12:14:32 -0300187 u8 fa, fp, vco_sel, vco_cal;
188 u8 regs[FC11_NR_REGS] = { };
189
190 regs[FC11_REG_7] = 0x0F;
191 regs[FC11_REG_8] = 0x3E;
192 regs[FC11_REG_10] = 0xB8;
193 regs[FC11_REG_11] = 0x80;
194 regs[FC11_REG_RCCAL] = 0x04;
195 err = fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]);
196 err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]);
197 err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]);
198 err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]);
199 err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);
200 if (err)
201 return -EIO;
202
203 /* Set VCO freq and VCO div */
204 if (freq < 54000) {
205 fvco = freq * 64;
206 regs[FC11_REG_VCO] = 0x82;
207 } else if (freq < 108000) {
208 fvco = freq * 32;
209 regs[FC11_REG_VCO] = 0x42;
210 } else if (freq < 216000) {
211 fvco = freq * 16;
212 regs[FC11_REG_VCO] = 0x22;
213 } else if (freq < 432000) {
214 fvco = freq * 8;
215 regs[FC11_REG_VCO] = 0x12;
216 } else {
217 fvco = freq * 4;
218 regs[FC11_REG_VCO] = 0x0A;
219 }
220
221 /* Calc XIN. The PLL reference frequency is 18 MHz. */
222 xdiv = fvco / 18000;
223 frac = fvco - xdiv * 18000;
224 frac = (frac << 15) / 18000;
225 if (frac >= 16384)
226 frac += 32786;
227 if (!frac)
228 xin = 0;
Michael Büscheea977e2012-04-02 12:14:32 -0300229 else
Michael Büsch03a497d2013-02-07 12:16:55 -0300230 xin = clamp_t(u32, frac, 512, 65024);
Michael Büscheea977e2012-04-02 12:14:32 -0300231 regs[FC11_REG_XINHI] = xin >> 8;
232 regs[FC11_REG_XINLO] = xin;
233
234 /* Calc FP and FA */
235 xdivr = xdiv;
236 if (fvco - xdiv * 18000 >= 9000)
237 xdivr += 1; /* round */
238 fp = xdivr / 8;
239 fa = xdivr - fp * 8;
240 if (fa < 2) {
241 fp -= 1;
242 fa += 8;
243 }
244 if (fp > 0x1F) {
Michael Büsch0917a602013-02-07 12:13:13 -0300245 fp = 0x1F;
246 fa = 0xF;
Michael Büscheea977e2012-04-02 12:14:32 -0300247 }
248 if (fa >= fp) {
249 dev_warn(&priv->i2c->dev,
250 "fa %02X >= fp %02X, but trying to continue\n",
251 (unsigned int)(u8)fa, (unsigned int)(u8)fp);
252 }
253 regs[FC11_REG_FA] = fa;
254 regs[FC11_REG_FP] = fp;
255
256 /* Select bandwidth */
257 switch (bandwidth) {
258 case 8000:
259 break;
260 case 7000:
261 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW7M;
262 break;
263 default:
264 dev_warn(&priv->i2c->dev, "Unsupported bandwidth %u kHz. "
265 "Using 6000 kHz.\n",
266 bandwidth);
267 bandwidth = 6000;
268 /* fallthrough */
269 case 6000:
270 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_BW6M;
271 break;
272 }
273
274 /* Pre VCO select */
275 if (fvco < 2320000) {
276 vco_sel = 0;
277 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
278 } else if (fvco < 3080000) {
279 vco_sel = 1;
280 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
281 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
282 } else {
283 vco_sel = 2;
284 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
285 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;
286 }
287
288 /* Fix for low freqs */
289 if (freq < 45000) {
290 regs[FC11_REG_FA] = 0x6;
291 regs[FC11_REG_FP] = 0x11;
292 }
293
294 /* Clock out fix */
295 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_CLKOUT;
296
297 /* Write the cached registers */
298 for (i = FC11_REG_FA; i <= FC11_REG_VCOSEL; i++) {
299 err = fc0011_writereg(priv, i, regs[i]);
300 if (err)
301 return err;
302 }
303
304 /* VCO calibration */
305 err = fc0011_vcocal_trigger(priv);
306 if (err)
307 return err;
308 err = fc0011_vcocal_read(priv, &vco_cal);
309 if (err)
310 return err;
311 vco_retries = 0;
Michael Büscha182fd82012-04-03 05:05:03 -0300312 while (!(vco_cal & FC11_VCOCAL_OK) && vco_retries < 3) {
Michael Büscheea977e2012-04-02 12:14:32 -0300313 /* Reset the tuner and try again */
314 err = fe->callback(priv->i2c, DVB_FRONTEND_COMPONENT_TUNER,
315 FC0011_FE_CALLBACK_RESET, priv->addr);
316 if (err) {
317 dev_err(&priv->i2c->dev, "Failed to reset tuner\n");
318 return err;
319 }
320 /* Reinit tuner config */
321 err = 0;
322 for (i = FC11_REG_FA; i <= FC11_REG_VCOSEL; i++)
323 err |= fc0011_writereg(priv, i, regs[i]);
324 err |= fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]);
325 err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]);
326 err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]);
327 err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]);
328 err |= fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);
329 if (err)
330 return -EIO;
331 /* VCO calibration */
332 err = fc0011_vcocal_trigger(priv);
333 if (err)
334 return err;
335 err = fc0011_vcocal_read(priv, &vco_cal);
336 if (err)
337 return err;
338 vco_retries++;
339 }
340 if (!(vco_cal & FC11_VCOCAL_OK)) {
341 dev_err(&priv->i2c->dev,
342 "Failed to read VCO calibration value (got %02X)\n",
343 (unsigned int)vco_cal);
344 return -EIO;
345 }
346 vco_cal &= FC11_VCOCAL_VALUEMASK;
347
348 switch (vco_sel) {
349 case 0:
350 if (vco_cal < 8) {
351 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
352 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
353 err = fc0011_writereg(priv, FC11_REG_VCOSEL,
354 regs[FC11_REG_VCOSEL]);
355 if (err)
356 return err;
357 err = fc0011_vcocal_trigger(priv);
358 if (err)
359 return err;
360 } else {
361 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
362 err = fc0011_writereg(priv, FC11_REG_VCOSEL,
363 regs[FC11_REG_VCOSEL]);
364 if (err)
365 return err;
366 }
367 break;
368 case 1:
369 if (vco_cal < 5) {
370 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
371 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;
372 err = fc0011_writereg(priv, FC11_REG_VCOSEL,
373 regs[FC11_REG_VCOSEL]);
374 if (err)
375 return err;
376 err = fc0011_vcocal_trigger(priv);
377 if (err)
378 return err;
379 } else if (vco_cal <= 48) {
380 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
381 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
382 err = fc0011_writereg(priv, FC11_REG_VCOSEL,
383 regs[FC11_REG_VCOSEL]);
384 if (err)
385 return err;
386 } else {
387 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
388 err = fc0011_writereg(priv, FC11_REG_VCOSEL,
389 regs[FC11_REG_VCOSEL]);
390 if (err)
391 return err;
392 err = fc0011_vcocal_trigger(priv);
393 if (err)
394 return err;
395 }
396 break;
397 case 2:
398 if (vco_cal > 53) {
399 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
400 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_1;
401 err = fc0011_writereg(priv, FC11_REG_VCOSEL,
402 regs[FC11_REG_VCOSEL]);
403 if (err)
404 return err;
405 err = fc0011_vcocal_trigger(priv);
406 if (err)
407 return err;
408 } else {
409 regs[FC11_REG_VCOSEL] &= ~(FC11_VCOSEL_1 | FC11_VCOSEL_2);
410 regs[FC11_REG_VCOSEL] |= FC11_VCOSEL_2;
411 err = fc0011_writereg(priv, FC11_REG_VCOSEL,
412 regs[FC11_REG_VCOSEL]);
413 if (err)
414 return err;
415 }
416 break;
417 }
418 err = fc0011_vcocal_read(priv, NULL);
419 if (err)
420 return err;
Michael Büschc421d5c2012-04-03 05:08:45 -0300421 usleep_range(10000, 50000);
Michael Büscheea977e2012-04-02 12:14:32 -0300422
423 err = fc0011_readreg(priv, FC11_REG_RCCAL, &regs[FC11_REG_RCCAL]);
424 if (err)
425 return err;
426 regs[FC11_REG_RCCAL] |= FC11_RCCAL_FORCE;
427 err = fc0011_writereg(priv, FC11_REG_RCCAL, regs[FC11_REG_RCCAL]);
428 if (err)
429 return err;
430 err = fc0011_writereg(priv, FC11_REG_16, 0xB);
431 if (err)
432 return err;
433
434 dev_dbg(&priv->i2c->dev, "Tuned to "
435 "fa=%02X fp=%02X xin=%02X%02X vco=%02X vcosel=%02X "
436 "vcocal=%02X(%u) bw=%u\n",
437 (unsigned int)regs[FC11_REG_FA],
438 (unsigned int)regs[FC11_REG_FP],
439 (unsigned int)regs[FC11_REG_XINHI],
440 (unsigned int)regs[FC11_REG_XINLO],
441 (unsigned int)regs[FC11_REG_VCO],
442 (unsigned int)regs[FC11_REG_VCOSEL],
443 (unsigned int)vco_cal, vco_retries,
444 (unsigned int)bandwidth);
445
446 priv->frequency = p->frequency;
447 priv->bandwidth = p->bandwidth_hz;
448
449 return 0;
450}
451
452static int fc0011_get_frequency(struct dvb_frontend *fe, u32 *frequency)
453{
454 struct fc0011_priv *priv = fe->tuner_priv;
455
456 *frequency = priv->frequency;
457
458 return 0;
459}
460
461static int fc0011_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
462{
463 *frequency = 0;
464
465 return 0;
466}
467
468static int fc0011_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
469{
470 struct fc0011_priv *priv = fe->tuner_priv;
471
472 *bandwidth = priv->bandwidth;
473
474 return 0;
475}
476
477static const struct dvb_tuner_ops fc0011_tuner_ops = {
478 .info = {
479 .name = "Fitipower FC0011",
480
481 .frequency_min = 45000000,
482 .frequency_max = 1000000000,
483 },
484
485 .release = fc0011_release,
486 .init = fc0011_init,
487
488 .set_params = fc0011_set_params,
489
490 .get_frequency = fc0011_get_frequency,
491 .get_if_frequency = fc0011_get_if_frequency,
492 .get_bandwidth = fc0011_get_bandwidth,
493};
494
495struct dvb_frontend *fc0011_attach(struct dvb_frontend *fe,
496 struct i2c_adapter *i2c,
497 const struct fc0011_config *config)
498{
499 struct fc0011_priv *priv;
500
501 priv = kzalloc(sizeof(struct fc0011_priv), GFP_KERNEL);
502 if (!priv)
503 return NULL;
504
505 priv->i2c = i2c;
506 priv->addr = config->i2c_address;
507
508 fe->tuner_priv = priv;
509 fe->ops.tuner_ops = fc0011_tuner_ops;
510
511 dev_info(&priv->i2c->dev, "Fitipower FC0011 tuner attached\n");
512
513 return fe;
514}
515EXPORT_SYMBOL(fc0011_attach);
516
517MODULE_DESCRIPTION("Fitipower FC0011 silicon tuner driver");
518MODULE_AUTHOR("Michael Buesch <m@bues.ch>");
519MODULE_LICENSE("GPL");