Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of version 2 of the GNU General Public License as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 11 | * General Public License for more details. |
| 12 | */ |
| 13 | #ifndef __ND_H__ |
| 14 | #define __ND_H__ |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 15 | #include <linux/libnvdimm.h> |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 16 | #include <linux/device.h> |
| 17 | #include <linux/mutex.h> |
| 18 | #include <linux/ndctl.h> |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 19 | #include <linux/types.h> |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 20 | #include "label.h" |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 21 | |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 22 | enum { |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 23 | /* |
| 24 | * Limits the maximum number of block apertures a dimm can |
| 25 | * support and is an input to the geometry/on-disk-format of a |
| 26 | * BTT instance |
| 27 | */ |
| 28 | ND_MAX_LANES = 256, |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 29 | SECTOR_SHIFT = 9, |
| 30 | }; |
| 31 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 32 | struct nvdimm_drvdata { |
| 33 | struct device *dev; |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 34 | int nsindex_size; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 35 | struct nd_cmd_get_config_size nsarea; |
| 36 | void *data; |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 37 | int ns_current, ns_next; |
| 38 | struct resource dpa; |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 39 | struct kref kref; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 40 | }; |
| 41 | |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 42 | struct nd_region_namespaces { |
| 43 | int count; |
| 44 | int active; |
| 45 | }; |
| 46 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 47 | static inline struct nd_namespace_index *to_namespace_index( |
| 48 | struct nvdimm_drvdata *ndd, int i) |
| 49 | { |
| 50 | if (i < 0) |
| 51 | return NULL; |
| 52 | |
| 53 | return ndd->data + sizeof_namespace_index(ndd) * i; |
| 54 | } |
| 55 | |
| 56 | static inline struct nd_namespace_index *to_current_namespace_index( |
| 57 | struct nvdimm_drvdata *ndd) |
| 58 | { |
| 59 | return to_namespace_index(ndd, ndd->ns_current); |
| 60 | } |
| 61 | |
| 62 | static inline struct nd_namespace_index *to_next_namespace_index( |
| 63 | struct nvdimm_drvdata *ndd) |
| 64 | { |
| 65 | return to_namespace_index(ndd, ndd->ns_next); |
| 66 | } |
| 67 | |
| 68 | #define nd_dbg_dpa(r, d, res, fmt, arg...) \ |
| 69 | dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \ |
| 70 | (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \ |
| 71 | (unsigned long long) (res ? resource_size(res) : 0), \ |
| 72 | (unsigned long long) (res ? res->start : 0), ##arg) |
| 73 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 74 | #define for_each_label(l, label, labels) \ |
| 75 | for (l = 0; (label = labels ? labels[l] : NULL); l++) |
| 76 | |
| 77 | #define for_each_dpa_resource(ndd, res) \ |
| 78 | for (res = (ndd)->dpa.child; res; res = res->sibling) |
| 79 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 80 | #define for_each_dpa_resource_safe(ndd, res, next) \ |
| 81 | for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \ |
| 82 | res; res = next, next = next ? next->sibling : NULL) |
| 83 | |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 84 | struct nd_percpu_lane { |
| 85 | int count; |
| 86 | spinlock_t lock; |
| 87 | }; |
| 88 | |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 89 | struct nd_region { |
| 90 | struct device dev; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 91 | struct ida ns_ida; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 92 | struct ida btt_ida; |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 93 | struct device *ns_seed; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 94 | struct device *btt_seed; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 95 | u16 ndr_mappings; |
| 96 | u64 ndr_size; |
| 97 | u64 ndr_start; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 98 | int id, num_lanes; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 99 | void *provider_data; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 100 | struct nd_interleave_set *nd_set; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 101 | struct nd_percpu_lane __percpu *lane; |
Dan Williams | 1f7df6f | 2015-06-09 20:13:14 -0400 | [diff] [blame] | 102 | struct nd_mapping mapping[0]; |
| 103 | }; |
| 104 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame^] | 105 | struct nd_blk_region { |
| 106 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); |
| 107 | void (*disable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); |
| 108 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
| 109 | void *iobuf, u64 len, int rw); |
| 110 | void *blk_provider_data; |
| 111 | struct nd_region nd_region; |
| 112 | }; |
| 113 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 114 | /* |
| 115 | * Lookup next in the repeating sequence of 01, 10, and 11. |
| 116 | */ |
| 117 | static inline unsigned nd_inc_seq(unsigned seq) |
| 118 | { |
| 119 | static const unsigned next[] = { 0, 2, 3, 1 }; |
| 120 | |
| 121 | return next[seq & 3]; |
| 122 | } |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 123 | |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 124 | struct btt; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 125 | struct nd_btt { |
| 126 | struct device dev; |
| 127 | struct nd_namespace_common *ndns; |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 128 | struct btt *btt; |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 129 | unsigned long lbasize; |
| 130 | u8 *uuid; |
| 131 | int id; |
| 132 | }; |
| 133 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 134 | enum nd_async_mode { |
| 135 | ND_SYNC, |
| 136 | ND_ASYNC, |
| 137 | }; |
| 138 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 139 | void wait_nvdimm_bus_probe_idle(struct device *dev); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 140 | void nd_device_register(struct device *dev); |
| 141 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 142 | int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf, |
| 143 | size_t len); |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 144 | ssize_t nd_sector_size_show(unsigned long current_lbasize, |
| 145 | const unsigned long *supported, char *buf); |
| 146 | ssize_t nd_sector_size_store(struct device *dev, const char *buf, |
| 147 | unsigned long *current_lbasize, const unsigned long *supported); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 148 | int __init nvdimm_init(void); |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 149 | int __init nd_region_init(void); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 150 | void nvdimm_exit(void); |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 151 | void nd_region_exit(void); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 152 | struct nvdimm; |
| 153 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 154 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); |
| 155 | int nvdimm_init_config_data(struct nvdimm_drvdata *ndd); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 156 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
| 157 | void *buf, size_t len); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 158 | struct nd_btt *to_nd_btt(struct device *dev); |
| 159 | struct btt_sb; |
| 160 | u64 nd_btt_sb_checksum(struct btt_sb *btt_sb); |
| 161 | #if IS_ENABLED(CONFIG_BTT) |
| 162 | int nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata); |
| 163 | bool is_nd_btt(struct device *dev); |
| 164 | struct device *nd_btt_create(struct nd_region *nd_region); |
| 165 | #else |
| 166 | static inline nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata) |
| 167 | { |
| 168 | return -ENODEV; |
| 169 | } |
| 170 | |
| 171 | static inline bool is_nd_btt(struct device *dev) |
| 172 | { |
| 173 | return false; |
| 174 | } |
| 175 | |
| 176 | static inline struct device *nd_btt_create(struct nd_region *nd_region) |
| 177 | { |
| 178 | return NULL; |
| 179 | } |
| 180 | |
| 181 | #endif |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 182 | struct nd_region *to_nd_region(struct device *dev); |
| 183 | int nd_region_to_nstype(struct nd_region *nd_region); |
| 184 | int nd_region_register_namespaces(struct nd_region *nd_region, int *err); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 185 | u64 nd_region_interleave_set_cookie(struct nd_region *nd_region); |
Dan Williams | 3d88002 | 2015-05-31 15:02:11 -0400 | [diff] [blame] | 186 | void nvdimm_bus_lock(struct device *dev); |
| 187 | void nvdimm_bus_unlock(struct device *dev); |
| 188 | bool is_nvdimm_bus_locked(struct device *dev); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 189 | void nvdimm_drvdata_release(struct kref *kref); |
| 190 | void put_ndd(struct nvdimm_drvdata *ndd); |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 191 | int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd); |
| 192 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res); |
| 193 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, |
| 194 | struct nd_label_id *label_id, resource_size_t start, |
| 195 | resource_size_t n); |
Dan Williams | 8c2f7e8 | 2015-06-25 04:20:04 -0400 | [diff] [blame] | 196 | resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); |
| 197 | struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); |
Vishal Verma | 5212e11 | 2015-06-25 04:20:32 -0400 | [diff] [blame] | 198 | int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); |
| 199 | int nvdimm_namespace_detach_btt(struct nd_namespace_common *ndns); |
| 200 | const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns, |
| 201 | char *name); |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame^] | 202 | int nd_blk_region_init(struct nd_region *nd_region); |
| 203 | resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 204 | #endif /* __ND_H__ */ |