Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/gpio.h> |
| 18 | #include <linux/irq.h> |
| 19 | #include <linux/clk.h> |
| 20 | |
| 21 | #include <asm/mach-types.h> |
| 22 | #include <asm/mach/arch.h> |
| 23 | #include <asm/mach/time.h> |
| 24 | |
| 25 | #include <mach/common.h> |
| 26 | #include <mach/iomux-mx28.h> |
| 27 | |
| 28 | #include "devices-mx28.h" |
| 29 | #include "gpio.h" |
| 30 | |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 31 | #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 32 | #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame^] | 33 | #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18) |
| 34 | #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 35 | #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) |
| 36 | |
| 37 | static const iomux_cfg_t mx28evk_pads[] __initconst = { |
| 38 | /* duart */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 39 | MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, |
| 40 | MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 41 | |
Shawn Guo | 1580818 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 42 | /* auart0 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 43 | MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL, |
| 44 | MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL, |
| 45 | MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL, |
| 46 | MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL, |
Shawn Guo | 1580818 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 47 | /* auart3 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 48 | MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL, |
| 49 | MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL, |
| 50 | MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL, |
| 51 | MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL, |
Shawn Guo | 1580818 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 52 | |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 53 | #define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP) |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 54 | /* fec0 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 55 | MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC, |
| 56 | MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC, |
| 57 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC, |
| 58 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC, |
| 59 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC, |
| 60 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC, |
| 61 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC, |
| 62 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC, |
| 63 | MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC, |
Shawn Guo | 48f76ed | 2011-01-11 20:09:24 +0800 | [diff] [blame] | 64 | /* fec1 */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 65 | MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC, |
| 66 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC, |
| 67 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC, |
| 68 | MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC, |
| 69 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC, |
| 70 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 71 | /* phy power line */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 72 | MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 73 | /* phy reset line */ |
Shawn Guo | db63a49 | 2011-03-06 00:40:19 +0800 | [diff] [blame] | 74 | MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL, |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 75 | |
| 76 | /* flexcan0 */ |
| 77 | MX28_PAD_GPMI_RDY2__CAN0_TX, |
| 78 | MX28_PAD_GPMI_RDY3__CAN0_RX, |
| 79 | /* flexcan1 */ |
| 80 | MX28_PAD_GPMI_CE2N__CAN1_TX, |
| 81 | MX28_PAD_GPMI_CE3N__CAN1_RX, |
| 82 | /* transceiver power control */ |
| 83 | MX28_PAD_SSP1_CMD__GPIO_2_13, |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame^] | 84 | |
| 85 | /* mxsfb (lcdif) */ |
| 86 | MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL, |
| 87 | MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL, |
| 88 | MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL, |
| 89 | MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL, |
| 90 | MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL, |
| 91 | MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL, |
| 92 | MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL, |
| 93 | MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL, |
| 94 | MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL, |
| 95 | MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL, |
| 96 | MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL, |
| 97 | MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL, |
| 98 | MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL, |
| 99 | MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL, |
| 100 | MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL, |
| 101 | MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL, |
| 102 | MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL, |
| 103 | MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL, |
| 104 | MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL, |
| 105 | MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL, |
| 106 | MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL, |
| 107 | MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL, |
| 108 | MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL, |
| 109 | MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL, |
| 110 | MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL, |
| 111 | MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL, |
| 112 | MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL, |
| 113 | MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL, |
| 114 | /* LCD panel enable */ |
| 115 | MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL, |
| 116 | /* backlight control */ |
| 117 | MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 118 | }; |
| 119 | |
| 120 | /* fec */ |
| 121 | static void __init mx28evk_fec_reset(void) |
| 122 | { |
| 123 | int ret; |
| 124 | struct clk *clk; |
| 125 | |
| 126 | /* Enable fec phy clock */ |
| 127 | clk = clk_get_sys("pll2", NULL); |
| 128 | if (!IS_ERR(clk)) |
| 129 | clk_enable(clk); |
| 130 | |
| 131 | /* Power up fec phy */ |
| 132 | ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power"); |
| 133 | if (ret) { |
| 134 | pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret); |
| 135 | return; |
| 136 | } |
| 137 | |
| 138 | ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0); |
| 139 | if (ret) { |
| 140 | pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret); |
| 141 | return; |
| 142 | } |
| 143 | |
| 144 | /* Reset fec phy */ |
| 145 | ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset"); |
| 146 | if (ret) { |
| 147 | pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret); |
| 148 | return; |
| 149 | } |
| 150 | |
| 151 | gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0); |
| 152 | if (ret) { |
| 153 | pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret); |
| 154 | return; |
| 155 | } |
| 156 | |
| 157 | mdelay(1); |
| 158 | gpio_set_value(MX28EVK_FEC_PHY_RESET, 1); |
| 159 | } |
| 160 | |
Shawn Guo | a320b27 | 2011-01-14 15:25:52 +0800 | [diff] [blame] | 161 | static struct fec_platform_data mx28_fec_pdata[] __initdata = { |
Shawn Guo | 48f76ed | 2011-01-11 20:09:24 +0800 | [diff] [blame] | 162 | { |
| 163 | /* fec0 */ |
| 164 | .phy = PHY_INTERFACE_MODE_RMII, |
| 165 | }, { |
| 166 | /* fec1 */ |
| 167 | .phy = PHY_INTERFACE_MODE_RMII, |
| 168 | }, |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 169 | }; |
| 170 | |
Shawn Guo | a320b27 | 2011-01-14 15:25:52 +0800 | [diff] [blame] | 171 | static int __init mx28evk_fec_get_mac(void) |
| 172 | { |
| 173 | int i; |
| 174 | u32 val; |
| 175 | const u32 *ocotp = mxs_get_ocotp(); |
| 176 | |
| 177 | if (!ocotp) |
| 178 | goto error; |
| 179 | |
| 180 | /* |
| 181 | * OCOTP only stores the last 4 octets for each mac address, |
| 182 | * so hard-code Freescale OUI (00:04:9f) here. |
| 183 | */ |
| 184 | for (i = 0; i < 2; i++) { |
| 185 | val = ocotp[i * 4]; |
| 186 | mx28_fec_pdata[i].mac[0] = 0x00; |
| 187 | mx28_fec_pdata[i].mac[1] = 0x04; |
| 188 | mx28_fec_pdata[i].mac[2] = 0x9f; |
| 189 | mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff; |
| 190 | mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff; |
| 191 | mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff; |
| 192 | } |
| 193 | |
| 194 | return 0; |
| 195 | |
| 196 | error: |
| 197 | pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__); |
| 198 | return -ETIMEDOUT; |
| 199 | } |
| 200 | |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 201 | /* |
| 202 | * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers |
| 203 | */ |
| 204 | static int flexcan0_en, flexcan1_en; |
| 205 | |
| 206 | static void mx28evk_flexcan_switch(void) |
| 207 | { |
| 208 | if (flexcan0_en || flexcan1_en) |
| 209 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1); |
| 210 | else |
| 211 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0); |
| 212 | } |
| 213 | |
| 214 | static void mx28evk_flexcan0_switch(int enable) |
| 215 | { |
| 216 | flexcan0_en = enable; |
| 217 | mx28evk_flexcan_switch(); |
| 218 | } |
| 219 | |
| 220 | static void mx28evk_flexcan1_switch(int enable) |
| 221 | { |
| 222 | flexcan1_en = enable; |
| 223 | mx28evk_flexcan_switch(); |
| 224 | } |
| 225 | |
| 226 | static const struct flexcan_platform_data |
| 227 | mx28evk_flexcan_pdata[] __initconst = { |
| 228 | { |
| 229 | .transceiver_switch = mx28evk_flexcan0_switch, |
| 230 | }, { |
| 231 | .transceiver_switch = mx28evk_flexcan1_switch, |
| 232 | } |
| 233 | }; |
| 234 | |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame^] | 235 | /* mxsfb (lcdif) */ |
| 236 | static struct fb_videomode mx28evk_video_modes[] = { |
| 237 | { |
| 238 | .name = "Seiko-43WVF1G", |
| 239 | .refresh = 60, |
| 240 | .xres = 800, |
| 241 | .yres = 480, |
| 242 | .pixclock = 29851, /* picosecond (33.5 MHz) */ |
| 243 | .left_margin = 89, |
| 244 | .right_margin = 164, |
| 245 | .upper_margin = 23, |
| 246 | .lower_margin = 10, |
| 247 | .hsync_len = 10, |
| 248 | .vsync_len = 10, |
| 249 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | |
| 250 | FB_SYNC_DOTCLK_FAILING_ACT, |
| 251 | }, |
| 252 | }; |
| 253 | |
| 254 | static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = { |
| 255 | .mode_list = mx28evk_video_modes, |
| 256 | .mode_count = ARRAY_SIZE(mx28evk_video_modes), |
| 257 | .default_bpp = 32, |
| 258 | .ld_intf_width = STMLCDIF_24BIT, |
| 259 | }; |
| 260 | |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 261 | static void __init mx28evk_init(void) |
| 262 | { |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 263 | int ret; |
| 264 | |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 265 | mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads)); |
| 266 | |
| 267 | mx28_add_duart(); |
Shawn Guo | 1580818 | 2011-02-17 14:28:52 +0800 | [diff] [blame] | 268 | mx28_add_auart0(); |
| 269 | mx28_add_auart3(); |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 270 | |
Shawn Guo | a320b27 | 2011-01-14 15:25:52 +0800 | [diff] [blame] | 271 | if (mx28evk_fec_get_mac()) |
| 272 | pr_warn("%s: failed on fec mac setup\n", __func__); |
| 273 | |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 274 | mx28evk_fec_reset(); |
Shawn Guo | 48f76ed | 2011-01-11 20:09:24 +0800 | [diff] [blame] | 275 | mx28_add_fec(0, &mx28_fec_pdata[0]); |
| 276 | mx28_add_fec(1, &mx28_fec_pdata[1]); |
Shawn Guo | acc9cdc | 2011-03-03 22:13:38 +0800 | [diff] [blame] | 277 | |
| 278 | ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, |
| 279 | "flexcan-switch"); |
| 280 | if (ret) { |
| 281 | pr_err("failed to request gpio flexcan-switch: %d\n", ret); |
| 282 | } else { |
| 283 | mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]); |
| 284 | mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); |
| 285 | } |
Shawn Guo | 0590a79 | 2011-03-08 18:51:10 +0800 | [diff] [blame^] | 286 | |
| 287 | ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); |
| 288 | if (ret) |
| 289 | pr_warn("failed to request gpio lcd-enable: %d\n", ret); |
| 290 | else |
| 291 | gpio_set_value(MX28EVK_LCD_ENABLE, 1); |
| 292 | |
| 293 | ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable"); |
| 294 | if (ret) |
| 295 | pr_warn("failed to request gpio bl-enable: %d\n", ret); |
| 296 | else |
| 297 | gpio_set_value(MX28EVK_BL_ENABLE, 1); |
| 298 | |
| 299 | mx28_add_mxsfb(&mx28evk_mxsfb_pdata); |
Shawn Guo | 4afbbb7 | 2010-12-18 21:39:35 +0800 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | static void __init mx28evk_timer_init(void) |
| 303 | { |
| 304 | mx28_clocks_init(); |
| 305 | } |
| 306 | |
| 307 | static struct sys_timer mx28evk_timer = { |
| 308 | .init = mx28evk_timer_init, |
| 309 | }; |
| 310 | |
| 311 | MACHINE_START(MX28EVK, "Freescale MX28 EVK") |
| 312 | /* Maintainer: Freescale Semiconductor, Inc. */ |
| 313 | .map_io = mx28_map_io, |
| 314 | .init_irq = mx28_init_irq, |
| 315 | .init_machine = mx28evk_init, |
| 316 | .timer = &mx28evk_timer, |
| 317 | MACHINE_END |