blob: 92c162af5045a2daf949518edec11730c2526d91 [file] [log] [blame]
Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
Viresh Kumar748c8762014-08-28 11:22:24 +05304 * Copyright (C) 2014 Linaro.
5 * Viresh Kumar <viresh.kumar@linaro.org>
6 *
Viresh Kumarbbcf0712014-09-09 19:58:03 +05307 * The OPP code in function set_target() is reused from
Shawn Guo95ceafd2012-09-06 07:09:11 +00008 * drivers/cpufreq/omap-cpufreq.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010018#include <linux/cpu.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040019#include <linux/cpu_cooling.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000020#include <linux/cpufreq.h>
Thomas Petazzoni34e5a522014-10-19 11:30:28 +020021#include <linux/cpufreq-dt.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040022#include <linux/cpumask.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000023#include <linux/err.h>
24#include <linux/module.h>
25#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050026#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000027#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000028#include <linux/regulator/consumer.h>
29#include <linux/slab.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040030#include <linux/thermal.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000031
Viresh Kumard2f31f12014-08-28 11:22:28 +053032struct private_data {
33 struct device *cpu_dev;
34 struct regulator *cpu_reg;
35 struct thermal_cooling_device *cdev;
36 unsigned int voltage_tolerance; /* in percentage */
37};
Shawn Guo95ceafd2012-09-06 07:09:11 +000038
Viresh Kumarbbcf0712014-09-09 19:58:03 +053039static int set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000040{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050041 struct dev_pm_opp *opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +053042 struct cpufreq_frequency_table *freq_table = policy->freq_table;
43 struct clk *cpu_clk = policy->clk;
44 struct private_data *priv = policy->driver_data;
45 struct device *cpu_dev = priv->cpu_dev;
46 struct regulator *cpu_reg = priv->cpu_reg;
jhbird.choi@samsung.com5df60552013-03-18 08:09:42 +000047 unsigned long volt = 0, volt_old = 0, tol = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053048 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010049 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000050 int ret;
51
Shawn Guo95ceafd2012-09-06 07:09:11 +000052 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
Paul Walmsley2209b0c2013-11-25 18:01:18 -080053 if (freq_Hz <= 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +000054 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000055
Viresh Kumard4019f02013-08-14 19:38:24 +053056 freq_exact = freq_Hz;
57 new_freq = freq_Hz / 1000;
58 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000059
Mark Brown4a511de2013-08-13 14:58:24 +020060 if (!IS_ERR(cpu_reg)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000061 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050062 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000063 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000064 rcu_read_unlock();
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053065 dev_err(cpu_dev, "failed to find OPP for %ld\n",
66 freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053067 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000068 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050069 volt = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000070 rcu_read_unlock();
Viresh Kumard2f31f12014-08-28 11:22:28 +053071 tol = volt * priv->voltage_tolerance / 100;
Shawn Guo95ceafd2012-09-06 07:09:11 +000072 volt_old = regulator_get_voltage(cpu_reg);
73 }
74
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053075 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
76 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
77 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000078
79 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053080 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000081 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
82 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053083 dev_err(cpu_dev, "failed to scale voltage up: %d\n",
84 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053085 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000086 }
87 }
88
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010089 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +000090 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053091 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
Mark Brown4a511de2013-08-13 14:58:24 +020092 if (!IS_ERR(cpu_reg))
Shawn Guo95ceafd2012-09-06 07:09:11 +000093 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +053094 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000095 }
96
97 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053098 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000099 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
100 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530101 dev_err(cpu_dev, "failed to scale voltage down: %d\n",
102 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +0530103 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000104 }
105 }
106
Viresh Kumarfd143b42013-04-01 12:57:44 +0000107 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000108}
109
Viresh Kumar95b61052014-08-28 11:22:30 +0530110static int allocate_resources(int cpu, struct device **cdev,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530111 struct regulator **creg, struct clk **cclk)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000112{
Viresh Kumard2f31f12014-08-28 11:22:28 +0530113 struct device *cpu_dev;
114 struct regulator *cpu_reg;
115 struct clk *cpu_clk;
116 int ret = 0;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530117 char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000118
Viresh Kumar95b61052014-08-28 11:22:30 +0530119 cpu_dev = get_cpu_device(cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100120 if (!cpu_dev) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530121 pr_err("failed to get cpu%d device\n", cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100122 return -ENODEV;
123 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000124
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530125 /* Try "cpu0" for older DTs */
Viresh Kumar95b61052014-08-28 11:22:30 +0530126 if (!cpu)
127 reg = reg_cpu0;
128 else
129 reg = reg_cpu;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530130
131try_again:
132 cpu_reg = regulator_get_optional(cpu_dev, reg);
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000133 if (IS_ERR(cpu_reg)) {
134 /*
Viresh Kumar95b61052014-08-28 11:22:30 +0530135 * If cpu's regulator supply node is present, but regulator is
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000136 * not yet registered, we should try defering probe.
137 */
138 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530139 dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
140 cpu);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530141 return -EPROBE_DEFER;
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000142 }
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530143
144 /* Try with "cpu-supply" */
145 if (reg == reg_cpu0) {
146 reg = reg_cpu;
147 goto try_again;
148 }
149
Thomas Petazzonia00de1a2014-10-19 11:30:29 +0200150 dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
151 cpu, PTR_ERR(cpu_reg));
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000152 }
153
Lucas Stache3beb0a2014-05-16 12:20:42 +0200154 cpu_clk = clk_get(cpu_dev, NULL);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000155 if (IS_ERR(cpu_clk)) {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530156 /* put regulator */
157 if (!IS_ERR(cpu_reg))
158 regulator_put(cpu_reg);
159
Shawn Guo95ceafd2012-09-06 07:09:11 +0000160 ret = PTR_ERR(cpu_clk);
Viresh Kumar48a86242014-08-28 11:22:26 +0530161
162 /*
163 * If cpu's clk node is present, but clock is not yet
164 * registered, we should try defering probe.
165 */
166 if (ret == -EPROBE_DEFER)
Viresh Kumar95b61052014-08-28 11:22:30 +0530167 dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
Viresh Kumar48a86242014-08-28 11:22:26 +0530168 else
Viresh Kumar95b61052014-08-28 11:22:30 +0530169 dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", ret,
170 cpu);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530171 } else {
172 *cdev = cpu_dev;
173 *creg = cpu_reg;
174 *cclk = cpu_clk;
175 }
Viresh Kumar48a86242014-08-28 11:22:26 +0530176
Viresh Kumard2f31f12014-08-28 11:22:28 +0530177 return ret;
178}
179
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530180static int cpufreq_init(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530181{
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200182 struct cpufreq_dt_platform_data *pd;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530183 struct cpufreq_frequency_table *freq_table;
184 struct thermal_cooling_device *cdev;
185 struct device_node *np;
186 struct private_data *priv;
187 struct device *cpu_dev;
188 struct regulator *cpu_reg;
189 struct clk *cpu_clk;
190 unsigned int transition_latency;
191 int ret;
192
Viresh Kumar95b61052014-08-28 11:22:30 +0530193 ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530194 if (ret) {
195 pr_err("%s: Failed to allocate resources\n: %d", __func__, ret);
196 return ret;
197 }
198
199 np = of_node_get(cpu_dev->of_node);
200 if (!np) {
201 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
202 ret = -ENOENT;
203 goto out_put_reg_clk;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000204 }
205
Viresh Kumar1bf8cc32014-07-11 20:24:19 +0530206 /* OPPs might be populated at runtime, don't check for error here */
207 of_init_opp_table(cpu_dev);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000208
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500209 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000210 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530211 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530212 goto out_put_node;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000213 }
214
Viresh Kumard2f31f12014-08-28 11:22:28 +0530215 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
216 if (!priv) {
217 ret = -ENOMEM;
218 goto out_free_table;
219 }
220
221 of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000222
223 if (of_property_read_u32(np, "clock-latency", &transition_latency))
224 transition_latency = CPUFREQ_ETERNAL;
225
Philipp Zabel43c638e2013-09-26 11:19:37 +0200226 if (!IS_ERR(cpu_reg)) {
Nishanth Menon47d43ba2013-09-19 16:03:51 -0500227 struct dev_pm_opp *opp;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000228 unsigned long min_uV, max_uV;
229 int i;
230
231 /*
232 * OPP is maintained in order of increasing frequency, and
233 * freq_table initialised from OPP is therefore sorted in the
234 * same order.
235 */
236 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
237 ;
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000238 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500239 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000240 freq_table[0].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500241 min_uV = dev_pm_opp_get_voltage(opp);
242 opp = dev_pm_opp_find_freq_exact(cpu_dev,
Shawn Guo95ceafd2012-09-06 07:09:11 +0000243 freq_table[i-1].frequency * 1000, true);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500244 max_uV = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +0000245 rcu_read_unlock();
Shawn Guo95ceafd2012-09-06 07:09:11 +0000246 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
247 if (ret > 0)
248 transition_latency += ret * 1000;
249 }
250
Eduardo Valentin77cff592013-07-15 09:09:14 -0400251 /*
252 * For now, just loading the cooling device;
253 * thermal DT code takes care of matching them.
254 */
255 if (of_find_property(np, "#cooling-cells", NULL)) {
256 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
257 if (IS_ERR(cdev))
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530258 dev_err(cpu_dev,
259 "running cpufreq without cooling device: %ld\n",
260 PTR_ERR(cdev));
Viresh Kumard2f31f12014-08-28 11:22:28 +0530261 else
262 priv->cdev = cdev;
Eduardo Valentin77cff592013-07-15 09:09:14 -0400263 }
Viresh Kumard2f31f12014-08-28 11:22:28 +0530264
265 priv->cpu_dev = cpu_dev;
266 priv->cpu_reg = cpu_reg;
267 policy->driver_data = priv;
268
269 policy->clk = cpu_clk;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200270 ret = cpufreq_table_validate_and_show(policy, freq_table);
271 if (ret) {
272 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
273 ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530274 goto out_cooling_unregister;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200275 }
276
277 policy->cpuinfo.transition_latency = transition_latency;
278
279 pd = cpufreq_get_driver_data();
280 if (pd && !pd->independent_clocks)
281 cpumask_setall(policy->cpus);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530282
Lucas Stachf9739d22014-09-26 15:33:46 +0200283 of_node_put(np);
284
Shawn Guo95ceafd2012-09-06 07:09:11 +0000285 return 0;
286
Viresh Kumard2f31f12014-08-28 11:22:28 +0530287out_cooling_unregister:
288 cpufreq_cooling_unregister(priv->cdev);
289 kfree(priv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000290out_free_table:
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500291 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000292out_put_node:
293 of_node_put(np);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530294out_put_reg_clk:
295 clk_put(cpu_clk);
296 if (!IS_ERR(cpu_reg))
297 regulator_put(cpu_reg);
298
299 return ret;
300}
301
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530302static int cpufreq_exit(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530303{
304 struct private_data *priv = policy->driver_data;
305
306 cpufreq_cooling_unregister(priv->cdev);
307 dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
308 clk_put(policy->clk);
309 if (!IS_ERR(priv->cpu_reg))
310 regulator_put(priv->cpu_reg);
311 kfree(priv);
312
313 return 0;
314}
315
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530316static struct cpufreq_driver dt_cpufreq_driver = {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530317 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
318 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530319 .target_index = set_target,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530320 .get = cpufreq_generic_get,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530321 .init = cpufreq_init,
322 .exit = cpufreq_exit,
323 .name = "cpufreq-dt",
Viresh Kumard2f31f12014-08-28 11:22:28 +0530324 .attr = cpufreq_generic_attr,
325};
326
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530327static int dt_cpufreq_probe(struct platform_device *pdev)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530328{
329 struct device *cpu_dev;
330 struct regulator *cpu_reg;
331 struct clk *cpu_clk;
332 int ret;
333
334 /*
335 * All per-cluster (CPUs sharing clock/voltages) initialization is done
336 * from ->init(). In probe(), we just need to make sure that clk and
337 * regulators are available. Else defer probe and retry.
338 *
339 * FIXME: Is checking this only for CPU0 sufficient ?
340 */
Viresh Kumar95b61052014-08-28 11:22:30 +0530341 ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530342 if (ret)
343 return ret;
344
345 clk_put(cpu_clk);
346 if (!IS_ERR(cpu_reg))
347 regulator_put(cpu_reg);
348
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200349 dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
350
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530351 ret = cpufreq_register_driver(&dt_cpufreq_driver);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530352 if (ret)
353 dev_err(cpu_dev, "failed register driver: %d\n", ret);
354
Shawn Guo95ceafd2012-09-06 07:09:11 +0000355 return ret;
356}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000357
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530358static int dt_cpufreq_remove(struct platform_device *pdev)
Shawn Guo5553f9e2013-01-30 14:27:49 +0000359{
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530360 cpufreq_unregister_driver(&dt_cpufreq_driver);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000361 return 0;
362}
363
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530364static struct platform_driver dt_cpufreq_platdrv = {
Shawn Guo5553f9e2013-01-30 14:27:49 +0000365 .driver = {
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530366 .name = "cpufreq-dt",
Shawn Guo5553f9e2013-01-30 14:27:49 +0000367 .owner = THIS_MODULE,
368 },
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530369 .probe = dt_cpufreq_probe,
370 .remove = dt_cpufreq_remove,
Shawn Guo5553f9e2013-01-30 14:27:49 +0000371};
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530372module_platform_driver(dt_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000373
Viresh Kumar748c8762014-08-28 11:22:24 +0530374MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000375MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530376MODULE_DESCRIPTION("Generic cpufreq driver");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000377MODULE_LICENSE("GPL");