blob: e247c15e517606c7d8e0237c4de1794e499fd680 [file] [log] [blame]
Koen Kooi2ba35492013-09-09 16:29:21 +02001/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/ {
Koen Kooi2ba35492013-09-09 16:29:21 +020010 cpus {
11 cpu@0 {
12 cpu0-supply = <&dcdc2_reg>;
13 };
14 };
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 };
20
Enric Balletbo i Serraf03a8812016-06-17 13:10:10 +020021 chosen {
22 stdout-path = &uart0;
23 };
24
Koen Kooi2ba35492013-09-09 16:29:21 +020025 leds {
26 pinctrl-names = "default";
27 pinctrl-0 = <&user_leds_s0>;
28
29 compatible = "gpio-leds";
30
31 led@2 {
32 label = "beaglebone:green:heartbeat";
33 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
34 linux,default-trigger = "heartbeat";
35 default-state = "off";
36 };
37
38 led@3 {
39 label = "beaglebone:green:mmc0";
40 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
41 linux,default-trigger = "mmc0";
42 default-state = "off";
43 };
44
45 led@4 {
46 label = "beaglebone:green:usr2";
47 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
Koen Kooiec8a7592013-09-12 20:35:35 +020048 linux,default-trigger = "cpu0";
Koen Kooi2ba35492013-09-09 16:29:21 +020049 default-state = "off";
50 };
51
52 led@5 {
53 label = "beaglebone:green:usr3";
54 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
Koen Kooiec8a7592013-09-12 20:35:35 +020055 linux,default-trigger = "mmc1";
Koen Kooi2ba35492013-09-09 16:29:21 +020056 default-state = "off";
57 };
58 };
Nishanth Menonea5b7c12013-09-30 09:40:16 -050059
60 vmmcsd_fixed: fixedregulator@0 {
61 compatible = "regulator-fixed";
62 regulator-name = "vmmcsd_fixed";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 };
Koen Kooi2ba35492013-09-09 16:29:21 +020066};
67
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +020068&am33xx_pinmux {
69 pinctrl-names = "default";
70 pinctrl-0 = <&clkout2_pin>;
71
72 user_leds_s0: user_leds_s0 {
73 pinctrl-single,pins = <
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -030074 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
75 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
76 AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
77 AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +020078 >;
79 };
80
81 i2c0_pins: pinmux_i2c0_pins {
82 pinctrl-single,pins = <
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -030083 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
84 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +020085 >;
86 };
87
Pantelis Antoniou5d1a2962015-05-13 11:04:34 +030088 i2c2_pins: pinmux_i2c2_pins {
89 pinctrl-single,pins = <
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -030090 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
91 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
Pantelis Antoniou5d1a2962015-05-13 11:04:34 +030092 >;
93 };
94
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +020095 uart0_pins: pinmux_uart0_pins {
96 pinctrl-single,pins = <
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -030097 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
98 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +020099 >;
100 };
101
102 clkout2_pin: pinmux_clkout2_pin {
103 pinctrl-single,pins = <
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -0300104 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200105 >;
106 };
107
108 cpsw_default: cpsw_default {
109 pinctrl-single,pins = <
110 /* Slave 1 */
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -0300111 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
112 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
113 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
114 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
115 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
116 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
117 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
118 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
119 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
120 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
121 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
122 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
123 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200124 >;
125 };
126
127 cpsw_sleep: cpsw_sleep {
128 pinctrl-single,pins = <
129 /* Slave 1 reset value */
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -0300130 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
131 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
132 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
133 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
134 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
135 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
136 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
137 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
138 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
139 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
140 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
141 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
142 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200143 >;
144 };
145
146 davinci_mdio_default: davinci_mdio_default {
147 pinctrl-single,pins = <
148 /* MDIO */
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -0300149 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
150 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200151 >;
152 };
153
154 davinci_mdio_sleep: davinci_mdio_sleep {
155 pinctrl-single,pins = <
156 /* MDIO reset value */
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -0300157 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
158 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200159 >;
160 };
161
162 mmc1_pins: pinmux_mmc1_pins {
163 pinctrl-single,pins = <
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -0300164 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200165 >;
166 };
167
168 emmc_pins: pinmux_emmc_pins {
169 pinctrl-single,pins = <
Javier Martinez Canillase03b2a22015-11-13 01:53:42 -0300170 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
171 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
172 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
173 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
174 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
175 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
176 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
177 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
178 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
179 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
Javier Martinez Canillas82d75af2013-09-20 17:00:00 +0200180 >;
181 };
182};
183
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200184&uart0 {
185 pinctrl-names = "default";
186 pinctrl-0 = <&uart0_pins>;
187
188 status = "okay";
189};
190
191&usb {
192 status = "okay";
Guido Martínez081df892014-04-28 17:54:32 -0300193};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200194
Guido Martínez081df892014-04-28 17:54:32 -0300195&usb_ctrl_mod {
196 status = "okay";
197};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200198
Guido Martínez081df892014-04-28 17:54:32 -0300199&usb0_phy {
200 status = "okay";
201};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200202
Guido Martínez081df892014-04-28 17:54:32 -0300203&usb1_phy {
204 status = "okay";
205};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200206
Guido Martínez081df892014-04-28 17:54:32 -0300207&usb0 {
208 status = "okay";
Robert Nelson67fd14b2015-02-24 10:10:43 -0600209 dr_mode = "peripheral";
Guido Martínez081df892014-04-28 17:54:32 -0300210};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200211
Guido Martínez081df892014-04-28 17:54:32 -0300212&usb1 {
213 status = "okay";
214 dr_mode = "host";
215};
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200216
Guido Martínez081df892014-04-28 17:54:32 -0300217&cppi41dma {
218 status = "okay";
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200219};
220
221&i2c0 {
222 pinctrl-names = "default";
223 pinctrl-0 = <&i2c0_pins>;
224
225 status = "okay";
226 clock-frequency = <400000>;
227
228 tps: tps@24 {
229 reg = <0x24>;
230 };
231
Pantelis Antoniou5d1a2962015-05-13 11:04:34 +0300232 baseboard_eeprom: baseboard_eeprom@50 {
233 compatible = "at,24c256";
234 reg = <0x50>;
235
236 #address-cells = <1>;
237 #size-cells = <1>;
238 baseboard_data: baseboard_data@0 {
239 reg = <0 0x100>;
240 };
241 };
Javier Martinez Canillase0efaaf2013-09-20 17:42:19 +0200242};
243
Pantelis Antoniou5d1a2962015-05-13 11:04:34 +0300244&i2c2 {
245 pinctrl-names = "default";
246 pinctrl-0 = <&i2c2_pins>;
247
248 status = "okay";
249 clock-frequency = <100000>;
250
251 cape_eeprom0: cape_eeprom0@54 {
252 compatible = "at,24c256";
253 reg = <0x54>;
254 #address-cells = <1>;
255 #size-cells = <1>;
256 cape0_data: cape_data@0 {
257 reg = <0 0x100>;
258 };
259 };
260
261 cape_eeprom1: cape_eeprom1@55 {
262 compatible = "at,24c256";
263 reg = <0x55>;
264 #address-cells = <1>;
265 #size-cells = <1>;
266 cape1_data: cape_data@0 {
267 reg = <0 0x100>;
268 };
269 };
270
271 cape_eeprom2: cape_eeprom2@56 {
272 compatible = "at,24c256";
273 reg = <0x56>;
274 #address-cells = <1>;
275 #size-cells = <1>;
276 cape2_data: cape_data@0 {
277 reg = <0 0x100>;
278 };
279 };
280
281 cape_eeprom3: cape_eeprom3@57 {
282 compatible = "at,24c256";
283 reg = <0x57>;
284 #address-cells = <1>;
285 #size-cells = <1>;
286 cape3_data: cape_data@0 {
287 reg = <0 0x100>;
288 };
289 };
290};
291
Peter Ujfalusie327b3f2016-02-19 16:12:19 +0200292
293/include/ "tps65217.dtsi"
294
Koen Kooi2ba35492013-09-09 16:29:21 +0200295&tps {
Matthijs van Duin7a6cb0a2015-06-01 21:33:28 +0200296 /*
297 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
298 * mode") at poweroff. Most BeagleBone versions do not support RTC-only
299 * mode and risk hardware damage if this mode is entered.
300 *
301 * For details, see linux-omap mailing list May 2015 thread
302 * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
303 * In particular, messages:
304 * http://www.spinics.net/lists/linux-omap/msg118585.html
305 * http://www.spinics.net/lists/linux-omap/msg118615.html
306 *
307 * You can override this later with
308 * &tps { /delete-property/ ti,pmic-shutdown-controller; }
309 * if you want to use RTC-only mode and made sure you are not affected
310 * by the hardware problems. (Tip: double-check by performing a current
311 * measurement after shutdown: it should be less than 1 mA.)
312 */
313 ti,pmic-shutdown-controller;
314
Koen Kooi2ba35492013-09-09 16:29:21 +0200315 regulators {
316 dcdc1_reg: regulator@0 {
Mark Brown83c9b2a2014-09-05 22:12:05 +0100317 regulator-name = "vdds_dpr";
Koen Kooi2ba35492013-09-09 16:29:21 +0200318 regulator-always-on;
319 };
320
321 dcdc2_reg: regulator@1 {
322 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
323 regulator-name = "vdd_mpu";
324 regulator-min-microvolt = <925000>;
Dave Gerlachfb515b82016-05-18 18:36:26 -0500325 regulator-max-microvolt = <1351500>;
Koen Kooi2ba35492013-09-09 16:29:21 +0200326 regulator-boot-on;
327 regulator-always-on;
328 };
329
330 dcdc3_reg: regulator@2 {
331 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
332 regulator-name = "vdd_core";
333 regulator-min-microvolt = <925000>;
334 regulator-max-microvolt = <1150000>;
335 regulator-boot-on;
336 regulator-always-on;
337 };
338
339 ldo1_reg: regulator@3 {
Mark Brown83c9b2a2014-09-05 22:12:05 +0100340 regulator-name = "vio,vrtc,vdds";
Koen Kooi2ba35492013-09-09 16:29:21 +0200341 regulator-always-on;
342 };
343
344 ldo2_reg: regulator@4 {
Mark Brown83c9b2a2014-09-05 22:12:05 +0100345 regulator-name = "vdd_3v3aux";
Koen Kooi2ba35492013-09-09 16:29:21 +0200346 regulator-always-on;
347 };
348
349 ldo3_reg: regulator@5 {
Mark Brown83c9b2a2014-09-05 22:12:05 +0100350 regulator-name = "vdd_1v8";
Koen Kooi2ba35492013-09-09 16:29:21 +0200351 regulator-always-on;
352 };
353
354 ldo4_reg: regulator@6 {
Mark Brown83c9b2a2014-09-05 22:12:05 +0100355 regulator-name = "vdd_3v3a";
Koen Kooi2ba35492013-09-09 16:29:21 +0200356 regulator-always-on;
357 };
358 };
359};
360
361&cpsw_emac0 {
362 phy_id = <&davinci_mdio>, <0>;
363 phy-mode = "mii";
364};
365
Koen Kooi2ba35492013-09-09 16:29:21 +0200366&mac {
Andrew F. Davisfd4eead2016-05-27 13:17:43 -0500367 slaves = <1>;
Koen Kooi2ba35492013-09-09 16:29:21 +0200368 pinctrl-names = "default", "sleep";
369 pinctrl-0 = <&cpsw_default>;
370 pinctrl-1 = <&cpsw_sleep>;
Johan Hovold16c75a12014-05-08 10:57:36 +0200371 status = "okay";
Koen Kooi2ba35492013-09-09 16:29:21 +0200372};
373
374&davinci_mdio {
375 pinctrl-names = "default", "sleep";
376 pinctrl-0 = <&davinci_mdio_default>;
377 pinctrl-1 = <&davinci_mdio_sleep>;
Johan Hovold16c75a12014-05-08 10:57:36 +0200378 status = "okay";
Koen Kooi2ba35492013-09-09 16:29:21 +0200379};
Alexander Holler3045fff2013-09-12 20:35:32 +0200380
381&mmc1 {
382 status = "okay";
Koen Kooi757a90e2013-09-12 20:35:34 +0200383 bus-width = <0x4>;
Alexander Holler3045fff2013-09-12 20:35:32 +0200384 pinctrl-names = "default";
385 pinctrl-0 = <&mmc1_pins>;
Mugunthan V Nc7ce74b2015-10-12 14:37:10 +0530386 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
Alexander Holler3045fff2013-09-12 20:35:32 +0200387};
Matt Portera43b446d2015-02-25 13:52:41 -0500388
389&aes {
390 status = "okay";
391};
392
393&sham {
394 status = "okay";
395};