blob: 9c1909b2a3ad27daf75c3e23fc9de4f1e43134b4 [file] [log] [blame]
Adam Lee522624f2013-12-18 22:23:38 +08001#ifndef __SDHCI_PCI_H
2#define __SDHCI_PCI_H
3
4/*
5 * PCI device IDs
6 */
7
8#define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
9#define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
10#define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
11#define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
12#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
13#define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50
Alan Cox066173b2014-08-20 13:27:44 +030014#define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294
15#define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295
16#define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296
Adam Lee522624f2013-12-18 22:23:38 +080017#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
18#define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9
19#define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa
20#define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
21#define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
22#define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
Derek Browne43e968c2014-06-24 06:56:36 -070023#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7
Adam Lee522624f2013-12-18 22:23:38 +080024
25/*
26 * PCI registers
27 */
28
29#define PCI_SDHCI_IFPIO 0x00
30#define PCI_SDHCI_IFDMA 0x01
31#define PCI_SDHCI_IFVENDOR 0x02
32
33#define PCI_SLOT_INFO 0x40 /* 8 bits */
34#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
35#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
36
37#define MAX_SLOTS 8
38
39struct sdhci_pci_chip;
40struct sdhci_pci_slot;
41
42struct sdhci_pci_fixes {
43 unsigned int quirks;
44 unsigned int quirks2;
45 bool allow_runtime_pm;
Adrian Hunter77a01222014-01-13 09:49:16 +020046 bool own_cd_for_runtime_pm;
Adam Lee522624f2013-12-18 22:23:38 +080047
48 int (*probe) (struct sdhci_pci_chip *);
49
50 int (*probe_slot) (struct sdhci_pci_slot *);
51 void (*remove_slot) (struct sdhci_pci_slot *, int);
52
53 int (*suspend) (struct sdhci_pci_chip *);
54 int (*resume) (struct sdhci_pci_chip *);
55};
56
57struct sdhci_pci_slot {
58 struct sdhci_pci_chip *chip;
59 struct sdhci_host *host;
60 struct sdhci_pci_data *data;
61
62 int pci_bar;
63 int rst_n_gpio;
64 int cd_gpio;
65 int cd_irq;
66
67 void (*hw_reset)(struct sdhci_host *host);
68};
69
70struct sdhci_pci_chip {
71 struct pci_dev *pdev;
72
73 unsigned int quirks;
74 unsigned int quirks2;
75 bool allow_runtime_pm;
76 const struct sdhci_pci_fixes *fixes;
77
78 int num_slots; /* Slots on controller */
79 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
80};
81
82#endif /* __SDHCI_PCI_H */