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Willy Tarreaua58d7332017-02-12 10:30:35 +01001/*
2 * Device Tree file for Synology DS116 NAS
3 *
4 * Copyright (C) 2017 Willy Tarreau <w@1wt.eu>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without
13 * any warranty of any kind, whether express or implied.
14 *
15 * Or, alternatively,
16 *
17 * b) Permission is hereby granted, free of charge, to any person
18 * obtaining a copy of this software and associated documentation
19 * files (the "Software"), to deal in the Software without
20 * restriction, including without limitation the rights to use,
21 * copy, modify, merge, publish, distribute, sublicense, and/or
22 * sell copies of the Software, and to permit persons to whom the
23 * Software is furnished to do so, subject to the following
24 * conditions:
25 *
26 * The above copyright notice and this permission notice shall be
27 * included in all copies or substantial portions of the Software.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
31 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
33 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
34 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
35 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
36 * OTHER DEALINGS IN THE SOFTWARE.
37 */
38
39/dts-v1/;
40#include "armada-385.dtsi"
41#include <dt-bindings/gpio/gpio.h>
42
43/ {
44 model = "Synology DS116";
45 compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
46
47 chosen {
48 stdout-path = "serial0:115200n8";
49 };
50
51 memory {
52 device_type = "memory";
53 reg = <0x00000000 0x40000000>; /* 1 GB */
54 };
55
56 soc {
57 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
58 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
59 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
60 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
61 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
62
63 internal-regs {
64 i2c@11000 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&i2c0_pins>;
67 status = "okay";
68 clock-frequency = <100000>;
69
70 eeprom@57 {
71 compatible = "atmel,24c64";
72 reg = <0x57>;
73 };
74 };
75
76 serial@12000 {
77 pinctrl-names = "default";
78 pinctrl-0 = <&uart0_pins>;
79 status = "okay";
80 };
81
82 serial@12100 {
83 /* A PIC16F1829 is connected to uart1 at 9600 bps,
84 * and takes single-character orders :
85 * "1" : power off // already handled by the poweroff node
86 * "2" : short beep
87 * "3" : long beep
88 * "4" : turn the power LED ON
89 * "5" : flash the power LED
90 * "6" : turn the power LED OFF
91 * "7" : turn the status LED OFF
92 * "8" : turn the status LED ON
93 * "9" : flash the status LED
94 * "A" : flash the motherboard LED (D8)
95 * "B" : turn the motherboard LED OFF
96 * "C" : hard reset
97 */
98 pinctrl-names = "default";
99 pinctrl-0 = <&uart1_pins>;
100 status = "okay";
101 };
102
103 poweroff@12100 {
104 compatible = "synology,power-off";
105 reg = <0x12100 0x100>;
106 clocks = <&coreclk 0>;
107 };
108
109 ethernet@70000 {
110 pinctrl-names = "default";
111 phy = <&phy0>;
112 phy-mode = "sgmii";
113 buffer-manager = <&bm>;
114 bm,pool-long = <0>;
115 status = "okay";
116 };
117
118
119 mdio@72004 {
120 pinctrl-names = "default";
121 pinctrl-0 = <&mdio_pins>;
122
123 phy0: ethernet-phy@1 {
124 reg = <1>;
125 };
126 };
127
128 sata@a8000 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&sata0_pins>;
131 status = "okay";
132 #address-cells = <1>;
133 #size-cells = <0>;
134
135 sata0: sata-port@0 {
136 reg = <0>;
137 target-supply = <&reg_5v_sata0>;
138 };
139 };
140
141 bm@c8000 {
142 status = "okay";
143 };
144
145 usb3@f0000 {
146 usb-phy = <&usb3_0_phy>;
147 status = "okay";
148 };
149
150 usb3@f8000 {
151 usb-phy = <&usb3_1_phy>;
152 status = "okay";
153 };
154 };
155
156 bm-bppi {
157 status = "okay";
158 };
159
160 gpio-fan {
161 compatible = "gpio-fan";
162 gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>,
163 <&gpio1 17 GPIO_ACTIVE_HIGH>,
164 <&gpio1 16 GPIO_ACTIVE_HIGH>;
165 gpio-fan,speed-map = < 0 0
166 1500 1
167 2500 2
168 3000 3
169 3400 4
170 3700 5
171 3900 6
172 4000 7>;
173 cooling-cells = <2>;
174 };
175
176 gpio-leds {
177 compatible = "gpio-leds";
178
179 /* The green part is on gpio0.20 which is also used by
180 * sata0, and accesses to SATA disk 0 make it blink so it
181 * doesn't need to be declared here.
182 */
183 orange {
184 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
185 label = "ds116:orange:disk";
186 default-state = "off";
187 };
188 };
189 };
190
191 usb3_0_phy: usb3_0_phy {
192 compatible = "usb-nop-xceiv";
193 vcc-supply = <&reg_usb3_0_vbus>;
194 };
195
196 usb3_1_phy: usb3_1_phy {
197 compatible = "usb-nop-xceiv";
198 vcc-supply = <&reg_usb3_1_vbus>;
199 };
200
201 reg_usb3_0_vbus: usb3-vbus0 {
202 compatible = "regulator-fixed";
203 regulator-name = "usb3-vbus0";
204 pinctrl-names = "default";
205 pinctrl-0 = <&xhci0_vbus_pins>;
206 regulator-min-microvolt = <5000000>;
207 regulator-max-microvolt = <5000000>;
208 enable-active-high;
209 gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
210 };
211
212 reg_usb3_1_vbus: usb3-vbus1 {
213 compatible = "regulator-fixed";
214 regulator-name = "usb3-vbus1";
215 pinctrl-names = "default";
216 pinctrl-0 = <&xhci1_vbus_pins>;
217 regulator-min-microvolt = <5000000>;
218 regulator-max-microvolt = <5000000>;
219 enable-active-high;
220 gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
221 };
222
223 reg_sata0: pwr-sata0 {
224 compatible = "regulator-fixed";
225 regulator-name = "pwr_en_sata0";
226 regulator-min-microvolt = <12000000>;
227 regulator-max-microvolt = <12000000>;
228 enable-active-high;
229 regulator-boot-on;
230 gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
231 };
232
233 reg_5v_sata0: v5-sata0 {
234 compatible = "regulator-fixed";
235 regulator-name = "v5.0-sata0";
236 regulator-min-microvolt = <5000000>;
237 regulator-max-microvolt = <5000000>;
238 vin-supply = <&reg_sata0>;
239 };
240
241 reg_12v_sata0: v12-sata0 {
242 compatible = "regulator-fixed";
243 regulator-name = "v12.0-sata0";
244 regulator-min-microvolt = <12000000>;
245 regulator-max-microvolt = <12000000>;
246 vin-supply = <&reg_sata0>;
247 };
248};
249
250&spi0 {
251 pinctrl-names = "default";
252 pinctrl-0 = <&spi0_pins>;
253 status = "okay";
254
255 spi-flash@0 {
256 #address-cells = <1>;
257 #size-cells = <1>;
258 compatible = "macronix,mx25l6405d", "jedec,spi-nor";
259 reg = <0>; /* Chip select 0 */
260 spi-max-frequency = <50000000>;
261 m25p,fast-read;
262
263 /* Note: there is a redboot partition table despite u-boot
264 * being used. The names presented here are the same as those
265 * found in the FIS directory. There is also a small device
266 * tree in the last 64kB of the RedBoot partition which is not
267 * enumerated. The MAC address and the serial number are listed
268 * in the "vendor" partition.
269 */
270 partition@00000000 {
271 label = "RedBoot";
272 reg = <0x00000000 0x000f0000>;
273 read-only;
274 };
275
276 partition@000c0000 {
277 label = "zImage";
278 reg = <0x000f0000 0x002d0000>;
279 };
280
281 partition@00390000 {
282 label = "rd.gz";
283 reg = <0x003c0000 0x00410000>;
284 };
285
286 partition@007d0000 {
287 label = "vendor";
288 reg = <0x007d0000 0x00010000>;
289 read-only;
290 };
291
292 partition@007e0000 {
293 label = "RedBoot config";
294 reg = <0x007e0000 0x00010000>;
295 read-only;
296 };
297
298 partition@007f0000 {
299 label = "FIS directory";
300 reg = <0x007f0000 0x00010000>;
301 read-only;
302 };
303 };
304};
305
306&pinctrl {
307 /* use only one pin for UART1, as mpp20 is used by sata0 */
308 uart1_pins: uart-pins-1 {
309 marvell,pins = "mpp19";
310 marvell,function = "ua1";
311 };
312
313 xhci0_vbus_pins: xhci0_vbus_pins {
314 marvell,pins = "mpp58";
315 marvell,function = "gpio";
316 };
317 xhci1_vbus_pins: xhci1_vbus_pins {
318 marvell,pins = "mpp59";
319 marvell,function = "gpio";
320 };
321};