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Lee Jonesdd06faf2012-09-26 17:08:35 +01001/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
Linus Walleij01dc9092013-10-02 15:42:59 +020010 *
11 * Device Tree for the HREF+ prior to the v60 variant.
Lee Jonesdd06faf2012-09-26 17:08:35 +010012 */
13
Linus Walleij2ce05a12013-08-07 15:37:52 +020014#include "ste-dbx5x0.dtsi"
Linus Walleij83200622014-02-03 14:32:20 +010015#include "ste-href-ab8500.dtsi"
Linus Walleij2ce05a12013-08-07 15:37:52 +020016#include "ste-href.dtsi"
Lee Jonesdd06faf2012-09-26 17:08:35 +010017
18/ {
Lee Jones6b8db132012-09-26 17:09:17 +010019 gpio_keys {
20 button@1 {
Linus Walleij1b1e8e02016-03-24 15:29:30 +010021 gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>;
Lee Jones6b8db132012-09-26 17:09:17 +010022 };
23 };
24
Gabriel Fernandezb1ba1432013-03-01 14:38:07 +010025 soc {
Linus Walleij1d8aca92015-07-08 15:15:22 +020026 /* Enable UART1 on this board */
27 uart@80121000 {
28 status = "okay";
29 };
30
Lee Jonesdd06faf2012-09-26 17:08:35 +010031 i2c@80004000 {
32 tps61052@33 {
33 compatible = "tps61052";
34 reg = <0x33>;
35 };
Linus Walleijd62407b2013-10-02 16:03:31 +020036
Linus Walleij7e0a51a2013-10-15 23:00:10 +020037 tc35892@42 {
38 compatible = "toshiba,tc35892";
Linus Walleijd62407b2013-10-02 16:03:31 +020039 reg = <0x42>;
40 interrupt-parent = <&gpio6>;
41 interrupts = <25 IRQ_TYPE_EDGE_RISING>;
Linus Walleija45cb692013-11-13 14:57:49 +010042 pinctrl-names = "default";
43 pinctrl-0 = <&tc35892_hrefprev60_mode>;
Linus Walleijd62407b2013-10-02 16:03:31 +020044
45 interrupt-controller;
Linus Walleij7e0a51a2013-10-15 23:00:10 +020046 #interrupt-cells = <1>;
Linus Walleijd62407b2013-10-02 16:03:31 +020047
48 tc3589x_gpio: tc3589x_gpio {
49 compatible = "tc3589x-gpio";
Linus Walleij7e0a51a2013-10-15 23:00:10 +020050 interrupts = <0>;
Linus Walleijd62407b2013-10-02 16:03:31 +020051
52 interrupt-controller;
53 #interrupt-cells = <2>;
54 gpio-controller;
55 #gpio-cells = <2>;
56 };
57 };
Lee Jonesdd06faf2012-09-26 17:08:35 +010058 };
Lee Jonescbebba72012-09-28 14:41:06 +010059
Linus Walleij38656822013-11-14 10:27:40 +010060 ssp@80002000 {
61 /*
62 * On the first generation boards, this SSP/SPI port was connected
63 * to the AB8500.
64 */
65 pinctrl-names = "default";
66 pinctrl-0 = <&ssp0_hrefprev60_mode>;
67 };
68
Ulf Hanssona987a3a2013-12-12 14:31:36 +010069 // External Micro SD slot
70 sdi0_per1@80126000 {
Linus Walleij1b1e8e02016-03-24 15:29:30 +010071 cd-gpios = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>;
Ulf Hanssona987a3a2013-12-12 14:31:36 +010072 };
73
Lee Jones8ad49c62012-11-15 13:07:02 +000074 vmmci: regulator-gpio {
Linus Walleij1b1e8e02016-03-24 15:29:30 +010075 gpios = <&tc3589x_gpio 18 GPIO_ACTIVE_HIGH>;
76 enable-gpio = <&tc3589x_gpio 17 GPIO_ACTIVE_HIGH>;
Linus Walleijadef9532016-10-07 09:30:46 +020077 enable-active-high;
Lee Jones8ad49c62012-11-15 13:07:02 +000078 };
Linus Walleij1e662352013-11-13 13:46:57 +010079
80 pinctrl {
Linus Walleij3ae27502013-11-15 10:07:48 +010081 /* Set this up using hogs */
82 pinctrl-names = "default";
83 pinctrl-0 = <&ipgpio_hrefprev60_mode>;
84
Linus Walleij38656822013-11-14 10:27:40 +010085 ssp0 {
86 ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
87 hrefprev60_mux {
Linus Walleij68d41f22014-09-29 17:21:56 +020088 function = "ssp0";
89 groups = "ssp0_a_1";
Linus Walleij38656822013-11-14 10:27:40 +010090 };
91 hrefprev60_cfg1 {
Linus Walleij1637d482014-09-30 12:16:25 +020092 pins = "GPIO145_C13"; /* RXD */
Linus Walleij38656822013-11-14 10:27:40 +010093 ste,config = <&in_pd>;
94 };
95
96 };
97 };
Linus Walleij1e662352013-11-13 13:46:57 +010098 sdi0 {
99 /* This additional pin needed on early MOP500 and HREFs previous to v60 */
100 sdi0_default_mode: sdi0_default {
101 hrefprev60_mux {
Linus Walleij68d41f22014-09-29 17:21:56 +0200102 function = "mc0";
103 groups = "mc0dat31dir_a_1";
Linus Walleij1e662352013-11-13 13:46:57 +0100104 };
105 hrefprev60_cfg1 {
Linus Walleij1637d482014-09-30 12:16:25 +0200106 pins = "GPIO21_AB3"; /* DAT31DIR */
Linus Walleij1e662352013-11-13 13:46:57 +0100107 ste,config = <&out_hi>;
108 };
109
110 };
111 };
Linus Walleija45cb692013-11-13 14:57:49 +0100112 tc35892 {
113 tc35892_hrefprev60_mode: tc35892_hrefprev60 {
114 hrefprev60_cfg {
Linus Walleij1637d482014-09-30 12:16:25 +0200115 pins = "GPIO217_AH12";
Linus Walleija45cb692013-11-13 14:57:49 +0100116 ste,config = <&gpio_in_pu>;
117 };
118 };
119 };
Linus Walleij3ae27502013-11-15 10:07:48 +0100120 ipgpio {
121 ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
122 hrefprev60_mux {
Linus Walleij68d41f22014-09-29 17:21:56 +0200123 function = "ipgpio";
124 groups = "ipgpio0_c_1", "ipgpio1_c_1";
Linus Walleij3ae27502013-11-15 10:07:48 +0100125 };
126 hrefprev60_cfg1 {
Linus Walleij1637d482014-09-30 12:16:25 +0200127 pins = "GPIO6_AF6", "GPIO7_AG5";
Linus Walleij3ae27502013-11-15 10:07:48 +0100128 ste,config = <&in_pu>;
129 };
130 };
131 };
Linus Walleij1e662352013-11-13 13:46:57 +0100132 };
Lee Jonesdd06faf2012-09-26 17:08:35 +0100133 };
134};