blob: 56066721edc17423726188858aa66e4ea017ff0b [file] [log] [blame]
Andy Wallsdbda8f72009-09-27 20:55:41 -03001/*
2 * Driver for the Conexant CX23885/7/8 PCIe bridge
3 *
4 * Infrared remote control input device
5 *
6 * Most of this file is
7 *
Andy Walls6afdeaf2010-05-23 18:53:35 -03008 * Copyright (C) 2009 Andy Walls <awalls@md.metrocast.net>
Andy Wallsdbda8f72009-09-27 20:55:41 -03009 *
10 * However, the cx23885_input_{init,fini} functions contained herein are
11 * derived from Linux kernel files linux/media/video/.../...-input.c marked as:
12 *
13 * Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
14 * Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
15 * Markus Rechberger <mrechberger@gmail.com>
16 * Mauro Carvalho Chehab <mchehab@infradead.org>
17 * Sascha Sommer <saschasommer@freenet.de>
18 * Copyright (C) 2004, 2005 Chris Pascoe
19 * Copyright (C) 2003, 2004 Gerd Knorr
20 * Copyright (C) 2003 Pavel Machek
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version 2
25 * of the License, or (at your option) any later version.
26 *
27 * This program is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details.
31 *
32 * You should have received a copy of the GNU General Public License
33 * along with this program; if not, write to the Free Software
34 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 * 02110-1301, USA.
36 */
37
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090038#include <linux/slab.h>
Mauro Carvalho Chehab6bda9642010-11-17 13:28:38 -030039#include <media/rc-core.h>
Andy Wallsdbda8f72009-09-27 20:55:41 -030040#include <media/v4l2-subdev.h>
41
42#include "cx23885.h"
43
Mauro Carvalho Chehab727e6252010-03-12 21:18:14 -030044#define MODULE_NAME "cx23885"
45
Andy Walls43c24072010-06-27 23:15:35 -030046static void cx23885_input_process_measurements(struct cx23885_dev *dev,
47 bool overrun)
Andy Wallsdbda8f72009-09-27 20:55:41 -030048{
Andy Walls43c24072010-06-27 23:15:35 -030049 struct cx23885_kernel_ir *kernel_ir = dev->kernel_ir;
Andy Wallsdbda8f72009-09-27 20:55:41 -030050
Andy Walls43c24072010-06-27 23:15:35 -030051 ssize_t num;
Andy Wallsdbda8f72009-09-27 20:55:41 -030052 int count, i;
Andy Walls43c24072010-06-27 23:15:35 -030053 bool handle = false;
Andy Wallsc02e0d12010-08-01 02:18:13 -030054 struct ir_raw_event ir_core_event[64];
Andy Wallsdbda8f72009-09-27 20:55:41 -030055
56 do {
Andy Walls43c24072010-06-27 23:15:35 -030057 num = 0;
Andy Wallsc02e0d12010-08-01 02:18:13 -030058 v4l2_subdev_call(dev->sd_ir, ir, rx_read, (u8 *) ir_core_event,
59 sizeof(ir_core_event), &num);
Andy Wallsdbda8f72009-09-27 20:55:41 -030060
Andy Wallsc02e0d12010-08-01 02:18:13 -030061 count = num / sizeof(struct ir_raw_event);
Andy Wallsdbda8f72009-09-27 20:55:41 -030062
Andy Walls43c24072010-06-27 23:15:35 -030063 for (i = 0; i < count; i++) {
David Härdemand8b4b582010-10-29 16:08:23 -030064 ir_raw_event_store(kernel_ir->rc,
Andy Wallsc02e0d12010-08-01 02:18:13 -030065 &ir_core_event[i]);
Andy Walls43c24072010-06-27 23:15:35 -030066 handle = true;
Andy Wallsdbda8f72009-09-27 20:55:41 -030067 }
Andy Wallsdbda8f72009-09-27 20:55:41 -030068 } while (num != 0);
Andy Walls43c24072010-06-27 23:15:35 -030069
70 if (overrun)
David Härdemand8b4b582010-10-29 16:08:23 -030071 ir_raw_event_reset(kernel_ir->rc);
Andy Walls43c24072010-06-27 23:15:35 -030072 else if (handle)
David Härdemand8b4b582010-10-29 16:08:23 -030073 ir_raw_event_handle(kernel_ir->rc);
Andy Wallsdbda8f72009-09-27 20:55:41 -030074}
75
76void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events)
77{
78 struct v4l2_subdev_ir_parameters params;
79 int overrun, data_available;
80
81 if (dev->sd_ir == NULL || events == 0)
82 return;
83
84 switch (dev->board) {
Andy Walls9b3d8ec2011-06-08 21:24:25 -030085 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsdbda8f72009-09-27 20:55:41 -030086 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -030087 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Djuri Baars076f0e32012-07-28 09:01:38 -030088 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -030089 case CX23885_BOARD_TEVII_S470:
90 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsdbda8f72009-09-27 20:55:41 -030091 /*
Andy Walls98d109f2010-07-19 00:41:41 -030092 * The only boards we handle right now. However other boards
Andy Wallsdbda8f72009-09-27 20:55:41 -030093 * using the CX2388x integrated IR controller should be similar
94 */
95 break;
96 default:
97 return;
98 }
99
100 overrun = events & (V4L2_SUBDEV_IR_RX_SW_FIFO_OVERRUN |
101 V4L2_SUBDEV_IR_RX_HW_FIFO_OVERRUN);
102
103 data_available = events & (V4L2_SUBDEV_IR_RX_END_OF_RX_DETECTED |
104 V4L2_SUBDEV_IR_RX_FIFO_SERVICE_REQ);
105
106 if (overrun) {
107 /* If there was a FIFO overrun, stop the device */
108 v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, &params);
109 params.enable = false;
110 /* Mitigate race with cx23885_input_ir_stop() */
111 params.shutdown = atomic_read(&dev->ir_input_stopping);
112 v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, &params);
113 }
114
115 if (data_available)
Andy Walls43c24072010-06-27 23:15:35 -0300116 cx23885_input_process_measurements(dev, overrun);
Andy Wallsdbda8f72009-09-27 20:55:41 -0300117
118 if (overrun) {
119 /* If there was a FIFO overrun, clear & restart the device */
120 params.enable = true;
121 /* Mitigate race with cx23885_input_ir_stop() */
122 params.shutdown = atomic_read(&dev->ir_input_stopping);
123 v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, &params);
124 }
125}
126
Andy Walls43c24072010-06-27 23:15:35 -0300127static int cx23885_input_ir_start(struct cx23885_dev *dev)
Andy Wallsdbda8f72009-09-27 20:55:41 -0300128{
Andy Wallsdbda8f72009-09-27 20:55:41 -0300129 struct v4l2_subdev_ir_parameters params;
130
131 if (dev->sd_ir == NULL)
Andy Walls43c24072010-06-27 23:15:35 -0300132 return -ENODEV;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300133
134 atomic_set(&dev->ir_input_stopping, 0);
135
Andy Wallsdbda8f72009-09-27 20:55:41 -0300136 v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, &params);
137 switch (dev->board) {
Andy Walls9b3d8ec2011-06-08 21:24:25 -0300138 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsdbda8f72009-09-27 20:55:41 -0300139 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -0300140 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Walls98d109f2010-07-19 00:41:41 -0300141 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsdbda8f72009-09-27 20:55:41 -0300142 /*
143 * The IR controller on this board only returns pulse widths.
144 * Any other mode setting will fail to set up the device.
145 */
146 params.mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH;
147 params.enable = true;
148 params.interrupt_enable = true;
149 params.shutdown = false;
150
151 /* Setup for baseband compatible with both RC-5 and RC-6A */
152 params.modulation = false;
153 /* RC-5: 2,222,222 ns = 1/36 kHz * 32 cycles * 2 marks * 1.25*/
154 /* RC-6A: 3,333,333 ns = 1/36 kHz * 16 cycles * 6 marks * 1.25*/
155 params.max_pulse_width = 3333333; /* ns */
156 /* RC-5: 666,667 ns = 1/36 kHz * 32 cycles * 1 mark * 0.75 */
157 /* RC-6A: 333,333 ns = 1/36 kHz * 16 cycles * 1 mark * 0.75 */
158 params.noise_filter_min_width = 333333; /* ns */
159 /*
160 * This board has inverted receive sense:
161 * mark is received as low logic level;
162 * falling edges are detected as rising edges; etc.
163 */
Andy Walls5a28d9a2010-07-18 19:57:25 -0300164 params.invert_level = true;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300165 break;
Djuri Baars076f0e32012-07-28 09:01:38 -0300166 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -0300167 case CX23885_BOARD_TEVII_S470:
168 /*
169 * The IR controller on this board only returns pulse widths.
170 * Any other mode setting will fail to set up the device.
171 */
172 params.mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH;
173 params.enable = true;
174 params.interrupt_enable = true;
175 params.shutdown = false;
176
177 /* Setup for a standard NEC protocol */
178 params.carrier_freq = 37917; /* Hz, 455 kHz/12 for NEC */
179 params.carrier_range_lower = 33000; /* Hz */
180 params.carrier_range_upper = 43000; /* Hz */
181 params.duty_cycle = 33; /* percent, 33 percent for NEC */
182
183 /*
184 * NEC max pulse width: (64/3)/(455 kHz/12) * 16 nec_units
185 * (64/3)/(455 kHz/12) * 16 nec_units * 1.375 = 12378022 ns
186 */
187 params.max_pulse_width = 12378022; /* ns */
188
189 /*
190 * NEC noise filter min width: (64/3)/(455 kHz/12) * 1 nec_unit
191 * (64/3)/(455 kHz/12) * 1 nec_units * 0.625 = 351648 ns
192 */
193 params.noise_filter_min_width = 351648; /* ns */
194
195 params.modulation = false;
196 params.invert_level = true;
197 break;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300198 }
199 v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, &params);
Andy Walls43c24072010-06-27 23:15:35 -0300200 return 0;
201}
202
David Härdemand8b4b582010-10-29 16:08:23 -0300203static int cx23885_input_ir_open(struct rc_dev *rc)
Andy Walls43c24072010-06-27 23:15:35 -0300204{
David Härdemand8b4b582010-10-29 16:08:23 -0300205 struct cx23885_kernel_ir *kernel_ir = rc->priv;
Andy Walls43c24072010-06-27 23:15:35 -0300206
207 if (kernel_ir->cx == NULL)
208 return -ENODEV;
209
210 return cx23885_input_ir_start(kernel_ir->cx);
Andy Wallsdbda8f72009-09-27 20:55:41 -0300211}
212
213static void cx23885_input_ir_stop(struct cx23885_dev *dev)
214{
Andy Wallsdbda8f72009-09-27 20:55:41 -0300215 struct v4l2_subdev_ir_parameters params;
216
217 if (dev->sd_ir == NULL)
218 return;
219
220 /*
221 * Stop the sd_ir subdevice from generating notifications and
222 * scheduling work.
223 * It is shutdown this way in order to mitigate a race with
224 * cx23885_input_rx_work_handler() in the overrun case, which could
225 * re-enable the subdevice.
226 */
227 atomic_set(&dev->ir_input_stopping, 1);
228 v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, &params);
229 while (params.shutdown == false) {
230 params.enable = false;
231 params.interrupt_enable = false;
232 params.shutdown = true;
233 v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, &params);
234 v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, &params);
235 }
Tejun Heo4bbcd842011-02-15 06:20:12 -0300236 flush_work_sync(&dev->cx25840_work);
237 flush_work_sync(&dev->ir_rx_work);
238 flush_work_sync(&dev->ir_tx_work);
Andy Walls43c24072010-06-27 23:15:35 -0300239}
Andy Wallsdbda8f72009-09-27 20:55:41 -0300240
David Härdemand8b4b582010-10-29 16:08:23 -0300241static void cx23885_input_ir_close(struct rc_dev *rc)
Andy Walls43c24072010-06-27 23:15:35 -0300242{
David Härdemand8b4b582010-10-29 16:08:23 -0300243 struct cx23885_kernel_ir *kernel_ir = rc->priv;
Andy Walls43c24072010-06-27 23:15:35 -0300244
245 if (kernel_ir->cx != NULL)
246 cx23885_input_ir_stop(kernel_ir->cx);
Andy Wallsdbda8f72009-09-27 20:55:41 -0300247}
248
249int cx23885_input_init(struct cx23885_dev *dev)
250{
Andy Walls43c24072010-06-27 23:15:35 -0300251 struct cx23885_kernel_ir *kernel_ir;
David Härdemand8b4b582010-10-29 16:08:23 -0300252 struct rc_dev *rc;
Andy Walls43c24072010-06-27 23:15:35 -0300253 char *rc_map;
254 enum rc_driver_type driver_type;
255 unsigned long allowed_protos;
256
Andy Wallsdbda8f72009-09-27 20:55:41 -0300257 int ret;
258
259 /*
260 * If the IR device (hardware registers, chip, GPIO lines, etc.) isn't
261 * encapsulated in a v4l2_subdev, then I'm not going to deal with it.
262 */
263 if (dev->sd_ir == NULL)
264 return -ENODEV;
265
266 switch (dev->board) {
Andy Walls9b3d8ec2011-06-08 21:24:25 -0300267 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsdbda8f72009-09-27 20:55:41 -0300268 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -0300269 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Walls98d109f2010-07-19 00:41:41 -0300270 case CX23885_BOARD_HAUPPAUGE_HVR1250:
271 /* Integrated CX2388[58] IR controller */
Andy Walls43c24072010-06-27 23:15:35 -0300272 driver_type = RC_DRIVER_IR_RAW;
Mauro Carvalho Chehab52b66142010-11-17 14:20:52 -0300273 allowed_protos = RC_TYPE_ALL;
Andy Walls43c24072010-06-27 23:15:35 -0300274 /* The grey Hauppauge RC-5 remote */
Mauro Carvalho Chehab15195d32011-01-24 12:18:47 -0300275 rc_map = RC_MAP_HAUPPAUGE;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300276 break;
Djuri Baars076f0e32012-07-28 09:01:38 -0300277 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
278 /* Integrated CX23885 IR controller */
279 driver_type = RC_DRIVER_IR_RAW;
280 allowed_protos = RC_TYPE_NEC;
281 /* The grey Terratec remote with orange buttons */
282 rc_map = RC_MAP_NEC_TERRATEC_CINERGY_XS;
283 break;
Andy Walls98d109f2010-07-19 00:41:41 -0300284 case CX23885_BOARD_TEVII_S470:
285 /* Integrated CX23885 IR controller */
286 driver_type = RC_DRIVER_IR_RAW;
Mauro Carvalho Chehab52b66142010-11-17 14:20:52 -0300287 allowed_protos = RC_TYPE_ALL;
Andy Walls98d109f2010-07-19 00:41:41 -0300288 /* A guess at the remote */
289 rc_map = RC_MAP_TEVII_NEC;
290 break;
Andy Walls43c24072010-06-27 23:15:35 -0300291 default:
Andy Wallsdbda8f72009-09-27 20:55:41 -0300292 return -ENODEV;
Andy Walls43c24072010-06-27 23:15:35 -0300293 }
Andy Wallsdbda8f72009-09-27 20:55:41 -0300294
Andy Walls43c24072010-06-27 23:15:35 -0300295 /* cx23885 board instance kernel IR state */
296 kernel_ir = kzalloc(sizeof(struct cx23885_kernel_ir), GFP_KERNEL);
297 if (kernel_ir == NULL)
298 return -ENOMEM;
299
300 kernel_ir->cx = dev;
301 kernel_ir->name = kasprintf(GFP_KERNEL, "cx23885 IR (%s)",
302 cx23885_boards[dev->board].name);
303 kernel_ir->phys = kasprintf(GFP_KERNEL, "pci-%s/ir0",
304 pci_name(dev->pci));
305
306 /* input device */
David Härdemand8b4b582010-10-29 16:08:23 -0300307 rc = rc_allocate_device();
308 if (!rc) {
Andy Wallsdbda8f72009-09-27 20:55:41 -0300309 ret = -ENOMEM;
310 goto err_out_free;
311 }
312
David Härdemand8b4b582010-10-29 16:08:23 -0300313 kernel_ir->rc = rc;
314 rc->input_name = kernel_ir->name;
315 rc->input_phys = kernel_ir->phys;
316 rc->input_id.bustype = BUS_PCI;
317 rc->input_id.version = 1;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300318 if (dev->pci->subsystem_vendor) {
David Härdemand8b4b582010-10-29 16:08:23 -0300319 rc->input_id.vendor = dev->pci->subsystem_vendor;
320 rc->input_id.product = dev->pci->subsystem_device;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300321 } else {
David Härdemand8b4b582010-10-29 16:08:23 -0300322 rc->input_id.vendor = dev->pci->vendor;
323 rc->input_id.product = dev->pci->device;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300324 }
David Härdemand8b4b582010-10-29 16:08:23 -0300325 rc->dev.parent = &dev->pci->dev;
326 rc->driver_type = driver_type;
327 rc->allowed_protos = allowed_protos;
328 rc->priv = kernel_ir;
329 rc->open = cx23885_input_ir_open;
330 rc->close = cx23885_input_ir_close;
331 rc->map_name = rc_map;
332 rc->driver_name = MODULE_NAME;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300333
Andy Walls43c24072010-06-27 23:15:35 -0300334 /* Go */
335 dev->kernel_ir = kernel_ir;
David Härdemand8b4b582010-10-29 16:08:23 -0300336 ret = rc_register_device(rc);
Andy Wallsdbda8f72009-09-27 20:55:41 -0300337 if (ret)
338 goto err_out_stop;
339
340 return 0;
341
342err_out_stop:
343 cx23885_input_ir_stop(dev);
Andy Walls43c24072010-06-27 23:15:35 -0300344 dev->kernel_ir = NULL;
David Härdemand8b4b582010-10-29 16:08:23 -0300345 rc_free_device(rc);
Andy Wallsdbda8f72009-09-27 20:55:41 -0300346err_out_free:
Andy Walls43c24072010-06-27 23:15:35 -0300347 kfree(kernel_ir->phys);
348 kfree(kernel_ir->name);
349 kfree(kernel_ir);
Andy Wallsdbda8f72009-09-27 20:55:41 -0300350 return ret;
351}
352
353void cx23885_input_fini(struct cx23885_dev *dev)
354{
355 /* Always stop the IR hardware from generating interrupts */
356 cx23885_input_ir_stop(dev);
357
Andy Walls43c24072010-06-27 23:15:35 -0300358 if (dev->kernel_ir == NULL)
Andy Wallsdbda8f72009-09-27 20:55:41 -0300359 return;
David Härdemand8b4b582010-10-29 16:08:23 -0300360 rc_unregister_device(dev->kernel_ir->rc);
Andy Walls43c24072010-06-27 23:15:35 -0300361 kfree(dev->kernel_ir->phys);
362 kfree(dev->kernel_ir->name);
363 kfree(dev->kernel_ir);
364 dev->kernel_ir = NULL;
Andy Wallsdbda8f72009-09-27 20:55:41 -0300365}