Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2005 - 2009 ServerEngines |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License version 2 |
| 7 | * as published by the Free Software Foundation. The full GNU General |
| 8 | * Public License is included in this distribution in the file called COPYING. |
| 9 | * |
| 10 | * Contact Information: |
| 11 | * linux-drivers@serverengines.com |
| 12 | * |
| 13 | * ServerEngines |
| 14 | * 209 N. Fair Oaks Ave |
| 15 | * Sunnyvale, CA 94085 |
| 16 | */ |
| 17 | |
| 18 | #include "be.h" |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 19 | #include "be_cmds.h" |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 20 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 21 | static void be_mcc_notify(struct be_adapter *adapter) |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 22 | { |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 23 | struct be_queue_info *mccq = &adapter->mcc_obj.q; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 24 | u32 val = 0; |
| 25 | |
| 26 | val |= mccq->id & DB_MCCQ_RING_ID_MASK; |
| 27 | val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT; |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 28 | iowrite32(val, adapter->db + DB_MCCQ_OFFSET); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 29 | } |
| 30 | |
| 31 | /* To check if valid bit is set, check the entire word as we don't know |
| 32 | * the endianness of the data (old entry is host endian while a new entry is |
| 33 | * little endian) */ |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 34 | static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl) |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 35 | { |
| 36 | if (compl->flags != 0) { |
| 37 | compl->flags = le32_to_cpu(compl->flags); |
| 38 | BUG_ON((compl->flags & CQE_FLAGS_VALID_MASK) == 0); |
| 39 | return true; |
| 40 | } else { |
| 41 | return false; |
| 42 | } |
| 43 | } |
| 44 | |
| 45 | /* Need to reset the entire word that houses the valid bit */ |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 46 | static inline void be_mcc_compl_use(struct be_mcc_compl *compl) |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 47 | { |
| 48 | compl->flags = 0; |
| 49 | } |
| 50 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 51 | static int be_mcc_compl_process(struct be_adapter *adapter, |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 52 | struct be_mcc_compl *compl) |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 53 | { |
| 54 | u16 compl_status, extd_status; |
| 55 | |
| 56 | /* Just swap the status to host endian; mcc tag is opaquely copied |
| 57 | * from mcc_wrb */ |
| 58 | be_dws_le_to_cpu(compl, 4); |
| 59 | |
| 60 | compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & |
| 61 | CQE_STATUS_COMPL_MASK; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 62 | if (compl_status == MCC_STATUS_SUCCESS) { |
| 63 | if (compl->tag0 == OPCODE_ETH_GET_STATISTICS) { |
| 64 | struct be_cmd_resp_get_stats *resp = |
| 65 | adapter->stats.cmd.va; |
| 66 | be_dws_le_to_cpu(&resp->hw_stats, |
| 67 | sizeof(resp->hw_stats)); |
| 68 | netdev_stats_update(adapter); |
| 69 | } |
| 70 | } else if (compl_status != MCC_STATUS_NOT_SUPPORTED) { |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 71 | extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & |
| 72 | CQE_STATUS_EXTD_MASK; |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 73 | dev_warn(&adapter->pdev->dev, |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 74 | "Error in cmd completion - opcode %d, compl %d, extd %d\n", |
| 75 | compl->tag0, compl_status, extd_status); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 76 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 77 | return compl_status; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 78 | } |
| 79 | |
Sathya Perla | a8f447bd | 2009-06-18 00:10:27 +0000 | [diff] [blame] | 80 | /* Link state evt is a string of bytes; no need for endian swapping */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 81 | static void be_async_link_state_process(struct be_adapter *adapter, |
Sathya Perla | a8f447bd | 2009-06-18 00:10:27 +0000 | [diff] [blame] | 82 | struct be_async_event_link_state *evt) |
| 83 | { |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 84 | be_link_status_update(adapter, |
| 85 | evt->port_link_status == ASYNC_EVENT_LINK_UP); |
Sathya Perla | a8f447bd | 2009-06-18 00:10:27 +0000 | [diff] [blame] | 86 | } |
| 87 | |
| 88 | static inline bool is_link_state_evt(u32 trailer) |
| 89 | { |
| 90 | return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) & |
| 91 | ASYNC_TRAILER_EVENT_CODE_MASK) == |
| 92 | ASYNC_EVENT_CODE_LINK_STATE); |
| 93 | } |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 94 | |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 95 | static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 96 | { |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 97 | struct be_queue_info *mcc_cq = &adapter->mcc_obj.cq; |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 98 | struct be_mcc_compl *compl = queue_tail_node(mcc_cq); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 99 | |
| 100 | if (be_mcc_compl_is_new(compl)) { |
| 101 | queue_tail_inc(mcc_cq); |
| 102 | return compl; |
| 103 | } |
| 104 | return NULL; |
| 105 | } |
| 106 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 107 | int be_process_mcc(struct be_adapter *adapter) |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 108 | { |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 109 | struct be_mcc_compl *compl; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 110 | int num = 0, status = 0; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 111 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 112 | spin_lock_bh(&adapter->mcc_cq_lock); |
| 113 | while ((compl = be_mcc_compl_get(adapter))) { |
Sathya Perla | a8f447bd | 2009-06-18 00:10:27 +0000 | [diff] [blame] | 114 | if (compl->flags & CQE_FLAGS_ASYNC_MASK) { |
| 115 | /* Interpret flags as an async trailer */ |
| 116 | BUG_ON(!is_link_state_evt(compl->flags)); |
| 117 | |
| 118 | /* Interpret compl as a async link evt */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 119 | be_async_link_state_process(adapter, |
Sathya Perla | a8f447bd | 2009-06-18 00:10:27 +0000 | [diff] [blame] | 120 | (struct be_async_event_link_state *) compl); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 121 | } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { |
| 122 | status = be_mcc_compl_process(adapter, compl); |
| 123 | atomic_dec(&adapter->mcc_obj.q.used); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 124 | } |
| 125 | be_mcc_compl_use(compl); |
| 126 | num++; |
| 127 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 128 | |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 129 | if (num) |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 130 | be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, num); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 131 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 132 | spin_unlock_bh(&adapter->mcc_cq_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 133 | return status; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 134 | } |
| 135 | |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 136 | /* Wait till no more pending mcc requests are present */ |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 137 | static int be_mcc_wait_compl(struct be_adapter *adapter) |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 138 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 139 | #define mcc_timeout 120000 /* 12s timeout */ |
| 140 | int i, status; |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 141 | for (i = 0; i < mcc_timeout; i++) { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 142 | status = be_process_mcc(adapter); |
| 143 | if (status) |
| 144 | return status; |
| 145 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 146 | if (atomic_read(&adapter->mcc_obj.q.used) == 0) |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 147 | break; |
| 148 | udelay(100); |
| 149 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 150 | if (i == mcc_timeout) { |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 151 | dev_err(&adapter->pdev->dev, "mccq poll timed out\n"); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 152 | return -1; |
| 153 | } |
| 154 | return 0; |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 155 | } |
| 156 | |
| 157 | /* Notify MCC requests and wait for completion */ |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 158 | static int be_mcc_notify_wait(struct be_adapter *adapter) |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 159 | { |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 160 | be_mcc_notify(adapter); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 161 | return be_mcc_wait_compl(adapter); |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 162 | } |
| 163 | |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 164 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 165 | { |
| 166 | int cnt = 0, wait = 5; |
| 167 | u32 ready; |
| 168 | |
| 169 | do { |
| 170 | ready = ioread32(db) & MPU_MAILBOX_DB_RDY_MASK; |
| 171 | if (ready) |
| 172 | break; |
| 173 | |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 174 | if (cnt > 4000000) { |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 175 | dev_err(&adapter->pdev->dev, "mbox poll timed out\n"); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 176 | return -1; |
| 177 | } |
| 178 | |
| 179 | if (cnt > 50) |
| 180 | wait = 200; |
| 181 | cnt += wait; |
| 182 | udelay(wait); |
| 183 | } while (true); |
| 184 | |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | /* |
| 189 | * Insert the mailbox address into the doorbell in two steps |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 190 | * Polls on the mbox doorbell till a command completion (or a timeout) occurs |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 191 | */ |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 192 | static int be_mbox_notify_wait(struct be_adapter *adapter) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 193 | { |
| 194 | int status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 195 | u32 val = 0; |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 196 | void __iomem *db = adapter->db + MPU_MAILBOX_DB_OFFSET; |
| 197 | struct be_dma_mem *mbox_mem = &adapter->mbox_mem; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 198 | struct be_mcc_mailbox *mbox = mbox_mem->va; |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 199 | struct be_mcc_compl *compl = &mbox->compl; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 200 | |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 201 | val |= MPU_MAILBOX_DB_HI_MASK; |
| 202 | /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ |
| 203 | val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; |
| 204 | iowrite32(val, db); |
| 205 | |
| 206 | /* wait for ready to be set */ |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 207 | status = be_mbox_db_ready_wait(adapter, db); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 208 | if (status != 0) |
| 209 | return status; |
| 210 | |
| 211 | val = 0; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 212 | /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ |
| 213 | val |= (u32)(mbox_mem->dma >> 4) << 2; |
| 214 | iowrite32(val, db); |
| 215 | |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 216 | status = be_mbox_db_ready_wait(adapter, db); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 217 | if (status != 0) |
| 218 | return status; |
| 219 | |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 220 | /* A cq entry has been made now */ |
Sathya Perla | efd2e40 | 2009-07-27 22:53:10 +0000 | [diff] [blame] | 221 | if (be_mcc_compl_is_new(compl)) { |
| 222 | status = be_mcc_compl_process(adapter, &mbox->compl); |
| 223 | be_mcc_compl_use(compl); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 224 | if (status) |
| 225 | return status; |
| 226 | } else { |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 227 | dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 228 | return -1; |
| 229 | } |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 230 | return 0; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 231 | } |
| 232 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 233 | static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 234 | { |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 235 | u32 sem = ioread32(adapter->csr + MPU_EP_SEMAPHORE_OFFSET); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 236 | |
| 237 | *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK; |
| 238 | if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK) |
| 239 | return -1; |
| 240 | else |
| 241 | return 0; |
| 242 | } |
| 243 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 244 | int be_cmd_POST(struct be_adapter *adapter) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 245 | { |
Sathya Perla | 43a04fdc | 2009-10-14 20:21:17 +0000 | [diff] [blame] | 246 | u16 stage; |
| 247 | int status, timeout = 0; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 248 | |
Sathya Perla | 43a04fdc | 2009-10-14 20:21:17 +0000 | [diff] [blame] | 249 | do { |
| 250 | status = be_POST_stage_get(adapter, &stage); |
| 251 | if (status) { |
| 252 | dev_err(&adapter->pdev->dev, "POST error; stage=0x%x\n", |
| 253 | stage); |
| 254 | return -1; |
| 255 | } else if (stage != POST_STAGE_ARMFW_RDY) { |
| 256 | set_current_state(TASK_INTERRUPTIBLE); |
| 257 | schedule_timeout(2 * HZ); |
| 258 | timeout += 2; |
| 259 | } else { |
| 260 | return 0; |
| 261 | } |
| 262 | } while (timeout < 20); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 263 | |
Sathya Perla | 43a04fdc | 2009-10-14 20:21:17 +0000 | [diff] [blame] | 264 | dev_err(&adapter->pdev->dev, "POST timeout; stage=0x%x\n", stage); |
| 265 | return -1; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 266 | } |
| 267 | |
| 268 | static inline void *embedded_payload(struct be_mcc_wrb *wrb) |
| 269 | { |
| 270 | return wrb->payload.embedded_payload; |
| 271 | } |
| 272 | |
| 273 | static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) |
| 274 | { |
| 275 | return &wrb->payload.sgl[0]; |
| 276 | } |
| 277 | |
| 278 | /* Don't touch the hdr after it's prepared */ |
| 279 | static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len, |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 280 | bool embedded, u8 sge_cnt, u32 opcode) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 281 | { |
| 282 | if (embedded) |
| 283 | wrb->embedded |= MCC_WRB_EMBEDDED_MASK; |
| 284 | else |
| 285 | wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) << |
| 286 | MCC_WRB_SGE_CNT_SHIFT; |
| 287 | wrb->payload_length = payload_len; |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 288 | wrb->tag0 = opcode; |
Sathya Perla | fa4281b | 2010-01-21 22:51:36 +0000 | [diff] [blame] | 289 | be_dws_cpu_to_le(wrb, 8); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 290 | } |
| 291 | |
| 292 | /* Don't touch the hdr after it's prepared */ |
| 293 | static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, |
| 294 | u8 subsystem, u8 opcode, int cmd_len) |
| 295 | { |
| 296 | req_hdr->opcode = opcode; |
| 297 | req_hdr->subsystem = subsystem; |
| 298 | req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); |
Ajit Khaparde | 07793d3 | 2010-02-16 00:18:46 +0000 | [diff] [blame^] | 299 | req_hdr->version = 0; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, |
| 303 | struct be_dma_mem *mem) |
| 304 | { |
| 305 | int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); |
| 306 | u64 dma = (u64)mem->dma; |
| 307 | |
| 308 | for (i = 0; i < buf_pages; i++) { |
| 309 | pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF); |
| 310 | pages[i].hi = cpu_to_le32(upper_32_bits(dma)); |
| 311 | dma += PAGE_SIZE_4K; |
| 312 | } |
| 313 | } |
| 314 | |
| 315 | /* Converts interrupt delay in microseconds to multiplier value */ |
| 316 | static u32 eq_delay_to_mult(u32 usec_delay) |
| 317 | { |
| 318 | #define MAX_INTR_RATE 651042 |
| 319 | const u32 round = 10; |
| 320 | u32 multiplier; |
| 321 | |
| 322 | if (usec_delay == 0) |
| 323 | multiplier = 0; |
| 324 | else { |
| 325 | u32 interrupt_rate = 1000000 / usec_delay; |
| 326 | /* Max delay, corresponding to the lowest interrupt rate */ |
| 327 | if (interrupt_rate == 0) |
| 328 | multiplier = 1023; |
| 329 | else { |
| 330 | multiplier = (MAX_INTR_RATE - interrupt_rate) * round; |
| 331 | multiplier /= interrupt_rate; |
| 332 | /* Round the multiplier to the closest value.*/ |
| 333 | multiplier = (multiplier + round/2) / round; |
| 334 | multiplier = min(multiplier, (u32)1023); |
| 335 | } |
| 336 | } |
| 337 | return multiplier; |
| 338 | } |
| 339 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 340 | static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 341 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 342 | struct be_dma_mem *mbox_mem = &adapter->mbox_mem; |
| 343 | struct be_mcc_wrb *wrb |
| 344 | = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; |
| 345 | memset(wrb, 0, sizeof(*wrb)); |
| 346 | return wrb; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 347 | } |
| 348 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 349 | static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 350 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 351 | struct be_queue_info *mccq = &adapter->mcc_obj.q; |
| 352 | struct be_mcc_wrb *wrb; |
| 353 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 354 | if (atomic_read(&mccq->used) >= mccq->len) { |
| 355 | dev_err(&adapter->pdev->dev, "Out of MCCQ wrbs\n"); |
| 356 | return NULL; |
| 357 | } |
| 358 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 359 | wrb = queue_head_node(mccq); |
| 360 | queue_head_inc(mccq); |
| 361 | atomic_inc(&mccq->used); |
| 362 | memset(wrb, 0, sizeof(*wrb)); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 363 | return wrb; |
| 364 | } |
| 365 | |
Sathya Perla | 2243e2e | 2009-11-22 22:02:03 +0000 | [diff] [blame] | 366 | /* Tell fw we're about to start firing cmds by writing a |
| 367 | * special pattern across the wrb hdr; uses mbox |
| 368 | */ |
| 369 | int be_cmd_fw_init(struct be_adapter *adapter) |
| 370 | { |
| 371 | u8 *wrb; |
| 372 | int status; |
| 373 | |
| 374 | spin_lock(&adapter->mbox_lock); |
| 375 | |
| 376 | wrb = (u8 *)wrb_from_mbox(adapter); |
| 377 | *wrb++ = 0xFF; |
| 378 | *wrb++ = 0x12; |
| 379 | *wrb++ = 0x34; |
| 380 | *wrb++ = 0xFF; |
| 381 | *wrb++ = 0xFF; |
| 382 | *wrb++ = 0x56; |
| 383 | *wrb++ = 0x78; |
| 384 | *wrb = 0xFF; |
| 385 | |
| 386 | status = be_mbox_notify_wait(adapter); |
| 387 | |
| 388 | spin_unlock(&adapter->mbox_lock); |
| 389 | return status; |
| 390 | } |
| 391 | |
| 392 | /* Tell fw we're done with firing cmds by writing a |
| 393 | * special pattern across the wrb hdr; uses mbox |
| 394 | */ |
| 395 | int be_cmd_fw_clean(struct be_adapter *adapter) |
| 396 | { |
| 397 | u8 *wrb; |
| 398 | int status; |
| 399 | |
| 400 | spin_lock(&adapter->mbox_lock); |
| 401 | |
| 402 | wrb = (u8 *)wrb_from_mbox(adapter); |
| 403 | *wrb++ = 0xFF; |
| 404 | *wrb++ = 0xAA; |
| 405 | *wrb++ = 0xBB; |
| 406 | *wrb++ = 0xFF; |
| 407 | *wrb++ = 0xFF; |
| 408 | *wrb++ = 0xCC; |
| 409 | *wrb++ = 0xDD; |
| 410 | *wrb = 0xFF; |
| 411 | |
| 412 | status = be_mbox_notify_wait(adapter); |
| 413 | |
| 414 | spin_unlock(&adapter->mbox_lock); |
| 415 | return status; |
| 416 | } |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 417 | int be_cmd_eq_create(struct be_adapter *adapter, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 418 | struct be_queue_info *eq, int eq_delay) |
| 419 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 420 | struct be_mcc_wrb *wrb; |
| 421 | struct be_cmd_req_eq_create *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 422 | struct be_dma_mem *q_mem = &eq->dma_mem; |
| 423 | int status; |
| 424 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 425 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 426 | |
| 427 | wrb = wrb_from_mbox(adapter); |
| 428 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 429 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 430 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, OPCODE_COMMON_EQ_CREATE); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 431 | |
| 432 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 433 | OPCODE_COMMON_EQ_CREATE, sizeof(*req)); |
| 434 | |
| 435 | req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); |
| 436 | |
| 437 | AMAP_SET_BITS(struct amap_eq_context, func, req->context, |
Sathya Perla | eec368f | 2009-07-27 22:52:23 +0000 | [diff] [blame] | 438 | be_pci_func(adapter)); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 439 | AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); |
| 440 | /* 4byte eqe*/ |
| 441 | AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); |
| 442 | AMAP_SET_BITS(struct amap_eq_context, count, req->context, |
| 443 | __ilog2_u32(eq->len/256)); |
| 444 | AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context, |
| 445 | eq_delay_to_mult(eq_delay)); |
| 446 | be_dws_cpu_to_le(req->context, sizeof(req->context)); |
| 447 | |
| 448 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
| 449 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 450 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 451 | if (!status) { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 452 | struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 453 | eq->id = le16_to_cpu(resp->eq_id); |
| 454 | eq->created = true; |
| 455 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 456 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 457 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 458 | return status; |
| 459 | } |
| 460 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 461 | /* Uses mbox */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 462 | int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 463 | u8 type, bool permanent, u32 if_handle) |
| 464 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 465 | struct be_mcc_wrb *wrb; |
| 466 | struct be_cmd_req_mac_query *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 467 | int status; |
| 468 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 469 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 470 | |
| 471 | wrb = wrb_from_mbox(adapter); |
| 472 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 473 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 474 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 475 | OPCODE_COMMON_NTWK_MAC_QUERY); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 476 | |
| 477 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 478 | OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req)); |
| 479 | |
| 480 | req->type = type; |
| 481 | if (permanent) { |
| 482 | req->permanent = 1; |
| 483 | } else { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 484 | req->if_id = cpu_to_le16((u16) if_handle); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 485 | req->permanent = 0; |
| 486 | } |
| 487 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 488 | status = be_mbox_notify_wait(adapter); |
| 489 | if (!status) { |
| 490 | struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 491 | memcpy(mac_addr, resp->mac.addr, ETH_ALEN); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 492 | } |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 493 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 494 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 495 | return status; |
| 496 | } |
| 497 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 498 | /* Uses synchronous MCCQ */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 499 | int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 500 | u32 if_id, u32 *pmac_id) |
| 501 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 502 | struct be_mcc_wrb *wrb; |
| 503 | struct be_cmd_req_pmac_add *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 504 | int status; |
| 505 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 506 | spin_lock_bh(&adapter->mcc_lock); |
| 507 | |
| 508 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 509 | if (!wrb) { |
| 510 | status = -EBUSY; |
| 511 | goto err; |
| 512 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 513 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 514 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 515 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 516 | OPCODE_COMMON_NTWK_PMAC_ADD); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 517 | |
| 518 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 519 | OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req)); |
| 520 | |
| 521 | req->if_id = cpu_to_le32(if_id); |
| 522 | memcpy(req->mac_address, mac_addr, ETH_ALEN); |
| 523 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 524 | status = be_mcc_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 525 | if (!status) { |
| 526 | struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); |
| 527 | *pmac_id = le32_to_cpu(resp->pmac_id); |
| 528 | } |
| 529 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 530 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 531 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 532 | return status; |
| 533 | } |
| 534 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 535 | /* Uses synchronous MCCQ */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 536 | int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 537 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 538 | struct be_mcc_wrb *wrb; |
| 539 | struct be_cmd_req_pmac_del *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 540 | int status; |
| 541 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 542 | spin_lock_bh(&adapter->mcc_lock); |
| 543 | |
| 544 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 545 | if (!wrb) { |
| 546 | status = -EBUSY; |
| 547 | goto err; |
| 548 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 549 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 550 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 551 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 552 | OPCODE_COMMON_NTWK_PMAC_DEL); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 553 | |
| 554 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 555 | OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req)); |
| 556 | |
| 557 | req->if_id = cpu_to_le32(if_id); |
| 558 | req->pmac_id = cpu_to_le32(pmac_id); |
| 559 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 560 | status = be_mcc_notify_wait(adapter); |
| 561 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 562 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 563 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 564 | return status; |
| 565 | } |
| 566 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 567 | /* Uses Mbox */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 568 | int be_cmd_cq_create(struct be_adapter *adapter, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 569 | struct be_queue_info *cq, struct be_queue_info *eq, |
| 570 | bool sol_evts, bool no_delay, int coalesce_wm) |
| 571 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 572 | struct be_mcc_wrb *wrb; |
| 573 | struct be_cmd_req_cq_create *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 574 | struct be_dma_mem *q_mem = &cq->dma_mem; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 575 | void *ctxt; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 576 | int status; |
| 577 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 578 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 579 | |
| 580 | wrb = wrb_from_mbox(adapter); |
| 581 | req = embedded_payload(wrb); |
| 582 | ctxt = &req->context; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 583 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 584 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 585 | OPCODE_COMMON_CQ_CREATE); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 586 | |
| 587 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 588 | OPCODE_COMMON_CQ_CREATE, sizeof(*req)); |
| 589 | |
| 590 | req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); |
| 591 | |
| 592 | AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm); |
| 593 | AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay); |
| 594 | AMAP_SET_BITS(struct amap_cq_context, count, ctxt, |
| 595 | __ilog2_u32(cq->len/256)); |
| 596 | AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1); |
| 597 | AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts); |
| 598 | AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1); |
| 599 | AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 600 | AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1); |
Sathya Perla | eec368f | 2009-07-27 22:52:23 +0000 | [diff] [blame] | 601 | AMAP_SET_BITS(struct amap_cq_context, func, ctxt, be_pci_func(adapter)); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 602 | be_dws_cpu_to_le(ctxt, sizeof(req->context)); |
| 603 | |
| 604 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
| 605 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 606 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 607 | if (!status) { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 608 | struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 609 | cq->id = le16_to_cpu(resp->cq_id); |
| 610 | cq->created = true; |
| 611 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 612 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 613 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 614 | |
| 615 | return status; |
| 616 | } |
| 617 | |
| 618 | static u32 be_encoded_q_len(int q_len) |
| 619 | { |
| 620 | u32 len_encoded = fls(q_len); /* log2(len) + 1 */ |
| 621 | if (len_encoded == 16) |
| 622 | len_encoded = 0; |
| 623 | return len_encoded; |
| 624 | } |
| 625 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 626 | int be_cmd_mccq_create(struct be_adapter *adapter, |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 627 | struct be_queue_info *mccq, |
| 628 | struct be_queue_info *cq) |
| 629 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 630 | struct be_mcc_wrb *wrb; |
| 631 | struct be_cmd_req_mcc_create *req; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 632 | struct be_dma_mem *q_mem = &mccq->dma_mem; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 633 | void *ctxt; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 634 | int status; |
| 635 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 636 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 637 | |
| 638 | wrb = wrb_from_mbox(adapter); |
| 639 | req = embedded_payload(wrb); |
| 640 | ctxt = &req->context; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 641 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 642 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 643 | OPCODE_COMMON_MCC_CREATE); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 644 | |
| 645 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 646 | OPCODE_COMMON_MCC_CREATE, sizeof(*req)); |
| 647 | |
| 648 | req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); |
| 649 | |
Sathya Perla | eec368f | 2009-07-27 22:52:23 +0000 | [diff] [blame] | 650 | AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt, be_pci_func(adapter)); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 651 | AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1); |
| 652 | AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt, |
| 653 | be_encoded_q_len(mccq->len)); |
| 654 | AMAP_SET_BITS(struct amap_mcc_context, cq_id, ctxt, cq->id); |
| 655 | |
| 656 | be_dws_cpu_to_le(ctxt, sizeof(req->context)); |
| 657 | |
| 658 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
| 659 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 660 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 661 | if (!status) { |
| 662 | struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); |
| 663 | mccq->id = le16_to_cpu(resp->id); |
| 664 | mccq->created = true; |
| 665 | } |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 666 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 667 | |
| 668 | return status; |
| 669 | } |
| 670 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 671 | int be_cmd_txq_create(struct be_adapter *adapter, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 672 | struct be_queue_info *txq, |
| 673 | struct be_queue_info *cq) |
| 674 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 675 | struct be_mcc_wrb *wrb; |
| 676 | struct be_cmd_req_eth_tx_create *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 677 | struct be_dma_mem *q_mem = &txq->dma_mem; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 678 | void *ctxt; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 679 | int status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 680 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 681 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 682 | |
| 683 | wrb = wrb_from_mbox(adapter); |
| 684 | req = embedded_payload(wrb); |
| 685 | ctxt = &req->context; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 686 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 687 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 688 | OPCODE_ETH_TX_CREATE); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 689 | |
| 690 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_TX_CREATE, |
| 691 | sizeof(*req)); |
| 692 | |
| 693 | req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); |
| 694 | req->ulp_num = BE_ULP1_NUM; |
| 695 | req->type = BE_ETH_TX_RING_TYPE_STANDARD; |
| 696 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 697 | AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, |
| 698 | be_encoded_q_len(txq->len)); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 699 | AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt, |
Sathya Perla | eec368f | 2009-07-27 22:52:23 +0000 | [diff] [blame] | 700 | be_pci_func(adapter)); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 701 | AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); |
| 702 | AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id); |
| 703 | |
| 704 | be_dws_cpu_to_le(ctxt, sizeof(req->context)); |
| 705 | |
| 706 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
| 707 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 708 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 709 | if (!status) { |
| 710 | struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); |
| 711 | txq->id = le16_to_cpu(resp->cid); |
| 712 | txq->created = true; |
| 713 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 714 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 715 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 716 | |
| 717 | return status; |
| 718 | } |
| 719 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 720 | /* Uses mbox */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 721 | int be_cmd_rxq_create(struct be_adapter *adapter, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 722 | struct be_queue_info *rxq, u16 cq_id, u16 frag_size, |
| 723 | u16 max_frame_size, u32 if_id, u32 rss) |
| 724 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 725 | struct be_mcc_wrb *wrb; |
| 726 | struct be_cmd_req_eth_rx_create *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 727 | struct be_dma_mem *q_mem = &rxq->dma_mem; |
| 728 | int status; |
| 729 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 730 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 731 | |
| 732 | wrb = wrb_from_mbox(adapter); |
| 733 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 734 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 735 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 736 | OPCODE_ETH_RX_CREATE); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 737 | |
| 738 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_CREATE, |
| 739 | sizeof(*req)); |
| 740 | |
| 741 | req->cq_id = cpu_to_le16(cq_id); |
| 742 | req->frag_size = fls(frag_size) - 1; |
| 743 | req->num_pages = 2; |
| 744 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
| 745 | req->interface_id = cpu_to_le32(if_id); |
| 746 | req->max_frame_size = cpu_to_le16(max_frame_size); |
| 747 | req->rss_queue = cpu_to_le32(rss); |
| 748 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 749 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 750 | if (!status) { |
| 751 | struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); |
| 752 | rxq->id = le16_to_cpu(resp->id); |
| 753 | rxq->created = true; |
| 754 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 755 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 756 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 757 | |
| 758 | return status; |
| 759 | } |
| 760 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 761 | /* Generic destroyer function for all types of queues |
| 762 | * Uses Mbox |
| 763 | */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 764 | int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 765 | int queue_type) |
| 766 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 767 | struct be_mcc_wrb *wrb; |
| 768 | struct be_cmd_req_q_destroy *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 769 | u8 subsys = 0, opcode = 0; |
| 770 | int status; |
| 771 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 772 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 773 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 774 | wrb = wrb_from_mbox(adapter); |
| 775 | req = embedded_payload(wrb); |
| 776 | |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 777 | switch (queue_type) { |
| 778 | case QTYPE_EQ: |
| 779 | subsys = CMD_SUBSYSTEM_COMMON; |
| 780 | opcode = OPCODE_COMMON_EQ_DESTROY; |
| 781 | break; |
| 782 | case QTYPE_CQ: |
| 783 | subsys = CMD_SUBSYSTEM_COMMON; |
| 784 | opcode = OPCODE_COMMON_CQ_DESTROY; |
| 785 | break; |
| 786 | case QTYPE_TXQ: |
| 787 | subsys = CMD_SUBSYSTEM_ETH; |
| 788 | opcode = OPCODE_ETH_TX_DESTROY; |
| 789 | break; |
| 790 | case QTYPE_RXQ: |
| 791 | subsys = CMD_SUBSYSTEM_ETH; |
| 792 | opcode = OPCODE_ETH_RX_DESTROY; |
| 793 | break; |
Sathya Perla | 5fb379e | 2009-06-18 00:02:59 +0000 | [diff] [blame] | 794 | case QTYPE_MCCQ: |
| 795 | subsys = CMD_SUBSYSTEM_COMMON; |
| 796 | opcode = OPCODE_COMMON_MCC_DESTROY; |
| 797 | break; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 798 | default: |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 799 | BUG(); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 800 | } |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 801 | |
| 802 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, opcode); |
| 803 | |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 804 | be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req)); |
| 805 | req->id = cpu_to_le16(q->id); |
| 806 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 807 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 5f0b849 | 2009-07-27 22:52:56 +0000 | [diff] [blame] | 808 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 809 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 810 | |
| 811 | return status; |
| 812 | } |
| 813 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 814 | /* Create an rx filtering policy configuration on an i/f |
| 815 | * Uses mbox |
| 816 | */ |
Sathya Perla | 73d540f | 2009-10-14 20:20:42 +0000 | [diff] [blame] | 817 | int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags, |
| 818 | u8 *mac, bool pmac_invalid, u32 *if_handle, u32 *pmac_id) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 819 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 820 | struct be_mcc_wrb *wrb; |
| 821 | struct be_cmd_req_if_create *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 822 | int status; |
| 823 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 824 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 825 | |
| 826 | wrb = wrb_from_mbox(adapter); |
| 827 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 828 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 829 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 830 | OPCODE_COMMON_NTWK_INTERFACE_CREATE); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 831 | |
| 832 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 833 | OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req)); |
| 834 | |
Sathya Perla | 73d540f | 2009-10-14 20:20:42 +0000 | [diff] [blame] | 835 | req->capability_flags = cpu_to_le32(cap_flags); |
| 836 | req->enable_flags = cpu_to_le32(en_flags); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 837 | req->pmac_invalid = pmac_invalid; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 838 | if (!pmac_invalid) |
| 839 | memcpy(req->mac_addr, mac, ETH_ALEN); |
| 840 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 841 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 842 | if (!status) { |
| 843 | struct be_cmd_resp_if_create *resp = embedded_payload(wrb); |
| 844 | *if_handle = le32_to_cpu(resp->interface_id); |
| 845 | if (!pmac_invalid) |
| 846 | *pmac_id = le32_to_cpu(resp->pmac_id); |
| 847 | } |
| 848 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 849 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 850 | return status; |
| 851 | } |
| 852 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 853 | /* Uses mbox */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 854 | int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 855 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 856 | struct be_mcc_wrb *wrb; |
| 857 | struct be_cmd_req_if_destroy *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 858 | int status; |
| 859 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 860 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 861 | |
| 862 | wrb = wrb_from_mbox(adapter); |
| 863 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 864 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 865 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 866 | OPCODE_COMMON_NTWK_INTERFACE_DESTROY); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 867 | |
| 868 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 869 | OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req)); |
| 870 | |
| 871 | req->interface_id = cpu_to_le32(interface_id); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 872 | |
| 873 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 874 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 875 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 876 | |
| 877 | return status; |
| 878 | } |
| 879 | |
| 880 | /* Get stats is a non embedded command: the request is not embedded inside |
| 881 | * WRB but is a separate dma memory block |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 882 | * Uses asynchronous MCC |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 883 | */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 884 | int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 885 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 886 | struct be_mcc_wrb *wrb; |
| 887 | struct be_cmd_req_get_stats *req; |
| 888 | struct be_sge *sge; |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 889 | int status = 0; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 890 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 891 | spin_lock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 892 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 893 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 894 | if (!wrb) { |
| 895 | status = -EBUSY; |
| 896 | goto err; |
| 897 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 898 | req = nonemb_cmd->va; |
| 899 | sge = nonembedded_sgl(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 900 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 901 | be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1, |
| 902 | OPCODE_ETH_GET_STATISTICS); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 903 | |
| 904 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, |
| 905 | OPCODE_ETH_GET_STATISTICS, sizeof(*req)); |
| 906 | sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma)); |
| 907 | sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF); |
| 908 | sge->len = cpu_to_le32(nonemb_cmd->size); |
| 909 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 910 | be_mcc_notify(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 911 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 912 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 913 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 914 | return status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 915 | } |
| 916 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 917 | /* Uses synchronous mcc */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 918 | int be_cmd_link_status_query(struct be_adapter *adapter, |
Sarveshwar Bandi | 0388f25 | 2009-10-28 04:15:20 -0700 | [diff] [blame] | 919 | bool *link_up, u8 *mac_speed, u16 *link_speed) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 920 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 921 | struct be_mcc_wrb *wrb; |
| 922 | struct be_cmd_req_link_status *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 923 | int status; |
| 924 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 925 | spin_lock_bh(&adapter->mcc_lock); |
| 926 | |
| 927 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 928 | if (!wrb) { |
| 929 | status = -EBUSY; |
| 930 | goto err; |
| 931 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 932 | req = embedded_payload(wrb); |
Sathya Perla | a8f447bd | 2009-06-18 00:10:27 +0000 | [diff] [blame] | 933 | |
| 934 | *link_up = false; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 935 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 936 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 937 | OPCODE_COMMON_NTWK_LINK_STATUS_QUERY); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 938 | |
| 939 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 940 | OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req)); |
| 941 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 942 | status = be_mcc_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 943 | if (!status) { |
| 944 | struct be_cmd_resp_link_status *resp = embedded_payload(wrb); |
Sarveshwar Bandi | 0388f25 | 2009-10-28 04:15:20 -0700 | [diff] [blame] | 945 | if (resp->mac_speed != PHY_LINK_SPEED_ZERO) { |
Sathya Perla | a8f447bd | 2009-06-18 00:10:27 +0000 | [diff] [blame] | 946 | *link_up = true; |
Sarveshwar Bandi | 0388f25 | 2009-10-28 04:15:20 -0700 | [diff] [blame] | 947 | *link_speed = le16_to_cpu(resp->link_speed); |
| 948 | *mac_speed = resp->mac_speed; |
| 949 | } |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 950 | } |
| 951 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 952 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 953 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 954 | return status; |
| 955 | } |
| 956 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 957 | /* Uses Mbox */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 958 | int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 959 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 960 | struct be_mcc_wrb *wrb; |
| 961 | struct be_cmd_req_get_fw_version *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 962 | int status; |
| 963 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 964 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 965 | |
| 966 | wrb = wrb_from_mbox(adapter); |
| 967 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 968 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 969 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 970 | OPCODE_COMMON_GET_FW_VERSION); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 971 | |
| 972 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 973 | OPCODE_COMMON_GET_FW_VERSION, sizeof(*req)); |
| 974 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 975 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 976 | if (!status) { |
| 977 | struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); |
| 978 | strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN); |
| 979 | } |
| 980 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 981 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 982 | return status; |
| 983 | } |
| 984 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 985 | /* set the EQ delay interval of an EQ to specified value |
| 986 | * Uses async mcc |
| 987 | */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 988 | int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 989 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 990 | struct be_mcc_wrb *wrb; |
| 991 | struct be_cmd_req_modify_eq_delay *req; |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 992 | int status = 0; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 993 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 994 | spin_lock_bh(&adapter->mcc_lock); |
| 995 | |
| 996 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 997 | if (!wrb) { |
| 998 | status = -EBUSY; |
| 999 | goto err; |
| 1000 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1001 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1002 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1003 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1004 | OPCODE_COMMON_MODIFY_EQ_DELAY); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1005 | |
| 1006 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1007 | OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req)); |
| 1008 | |
| 1009 | req->num_eq = cpu_to_le32(1); |
| 1010 | req->delay[0].eq_id = cpu_to_le32(eq_id); |
| 1011 | req->delay[0].phase = 0; |
| 1012 | req->delay[0].delay_multiplier = cpu_to_le32(eqd); |
| 1013 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1014 | be_mcc_notify(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1015 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1016 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1017 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1018 | return status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1019 | } |
| 1020 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1021 | /* Uses sycnhronous mcc */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1022 | int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1023 | u32 num, bool untagged, bool promiscuous) |
| 1024 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1025 | struct be_mcc_wrb *wrb; |
| 1026 | struct be_cmd_req_vlan_config *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1027 | int status; |
| 1028 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1029 | spin_lock_bh(&adapter->mcc_lock); |
| 1030 | |
| 1031 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1032 | if (!wrb) { |
| 1033 | status = -EBUSY; |
| 1034 | goto err; |
| 1035 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1036 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1037 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1038 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1039 | OPCODE_COMMON_NTWK_VLAN_CONFIG); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1040 | |
| 1041 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1042 | OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req)); |
| 1043 | |
| 1044 | req->interface_id = if_id; |
| 1045 | req->promiscuous = promiscuous; |
| 1046 | req->untagged = untagged; |
| 1047 | req->num_vlan = num; |
| 1048 | if (!promiscuous) { |
| 1049 | memcpy(req->normal_vlan, vtag_array, |
| 1050 | req->num_vlan * sizeof(vtag_array[0])); |
| 1051 | } |
| 1052 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1053 | status = be_mcc_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1054 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1055 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1056 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1057 | return status; |
| 1058 | } |
| 1059 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1060 | /* Uses MCC for this command as it may be called in BH context |
| 1061 | * Uses synchronous mcc |
| 1062 | */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1063 | int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1064 | { |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 1065 | struct be_mcc_wrb *wrb; |
| 1066 | struct be_cmd_req_promiscuous_config *req; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1067 | int status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1068 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1069 | spin_lock_bh(&adapter->mcc_lock); |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 1070 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1071 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1072 | if (!wrb) { |
| 1073 | status = -EBUSY; |
| 1074 | goto err; |
| 1075 | } |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 1076 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1077 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1078 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, OPCODE_ETH_PROMISCUOUS); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1079 | |
| 1080 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, |
| 1081 | OPCODE_ETH_PROMISCUOUS, sizeof(*req)); |
| 1082 | |
| 1083 | if (port_num) |
| 1084 | req->port1_promiscuous = en; |
| 1085 | else |
| 1086 | req->port0_promiscuous = en; |
| 1087 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1088 | status = be_mcc_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1089 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1090 | err: |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1091 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1092 | return status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1093 | } |
| 1094 | |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 1095 | /* |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1096 | * Uses MCC for this command as it may be called in BH context |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 1097 | * (mc == NULL) => multicast promiscous |
| 1098 | */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1099 | int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, |
Sathya Perla | e7b909a | 2009-11-22 22:01:10 +0000 | [diff] [blame] | 1100 | struct dev_mc_list *mc_list, u32 mc_count, |
| 1101 | struct be_dma_mem *mem) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1102 | { |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 1103 | struct be_mcc_wrb *wrb; |
Sathya Perla | e7b909a | 2009-11-22 22:01:10 +0000 | [diff] [blame] | 1104 | struct be_cmd_req_mcast_mac_config *req = mem->va; |
| 1105 | struct be_sge *sge; |
| 1106 | int status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1107 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1108 | spin_lock_bh(&adapter->mcc_lock); |
Sathya Perla | 6ac7b68 | 2009-06-18 00:05:54 +0000 | [diff] [blame] | 1109 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1110 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1111 | if (!wrb) { |
| 1112 | status = -EBUSY; |
| 1113 | goto err; |
| 1114 | } |
Sathya Perla | e7b909a | 2009-11-22 22:01:10 +0000 | [diff] [blame] | 1115 | sge = nonembedded_sgl(wrb); |
| 1116 | memset(req, 0, sizeof(*req)); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1117 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1118 | be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1, |
| 1119 | OPCODE_COMMON_NTWK_MULTICAST_SET); |
Sathya Perla | e7b909a | 2009-11-22 22:01:10 +0000 | [diff] [blame] | 1120 | sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); |
| 1121 | sge->pa_lo = cpu_to_le32(mem->dma & 0xFFFFFFFF); |
| 1122 | sge->len = cpu_to_le32(mem->size); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1123 | |
| 1124 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1125 | OPCODE_COMMON_NTWK_MULTICAST_SET, sizeof(*req)); |
| 1126 | |
| 1127 | req->interface_id = if_id; |
Sathya Perla | e7b909a | 2009-11-22 22:01:10 +0000 | [diff] [blame] | 1128 | if (mc_list) { |
Sathya Perla | 24307ee | 2009-06-18 00:09:25 +0000 | [diff] [blame] | 1129 | int i; |
| 1130 | struct dev_mc_list *mc; |
| 1131 | |
| 1132 | req->num_mac = cpu_to_le16(mc_count); |
| 1133 | |
| 1134 | for (mc = mc_list, i = 0; mc; mc = mc->next, i++) |
| 1135 | memcpy(req->mac[i].byte, mc->dmi_addr, ETH_ALEN); |
| 1136 | } else { |
| 1137 | req->promiscuous = 1; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1138 | } |
| 1139 | |
Sathya Perla | e7b909a | 2009-11-22 22:01:10 +0000 | [diff] [blame] | 1140 | status = be_mcc_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1141 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1142 | err: |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1143 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | e7b909a | 2009-11-22 22:01:10 +0000 | [diff] [blame] | 1144 | return status; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1145 | } |
| 1146 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1147 | /* Uses synchrounous mcc */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1148 | int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1149 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1150 | struct be_mcc_wrb *wrb; |
| 1151 | struct be_cmd_req_set_flow_control *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1152 | int status; |
| 1153 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1154 | spin_lock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1155 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1156 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1157 | if (!wrb) { |
| 1158 | status = -EBUSY; |
| 1159 | goto err; |
| 1160 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1161 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1162 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1163 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1164 | OPCODE_COMMON_SET_FLOW_CONTROL); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1165 | |
| 1166 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1167 | OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req)); |
| 1168 | |
| 1169 | req->tx_flow_control = cpu_to_le16((u16)tx_fc); |
| 1170 | req->rx_flow_control = cpu_to_le16((u16)rx_fc); |
| 1171 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1172 | status = be_mcc_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1173 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1174 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1175 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1176 | return status; |
| 1177 | } |
| 1178 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1179 | /* Uses sycn mcc */ |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1180 | int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1181 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1182 | struct be_mcc_wrb *wrb; |
| 1183 | struct be_cmd_req_get_flow_control *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1184 | int status; |
| 1185 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1186 | spin_lock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1187 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1188 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1189 | if (!wrb) { |
| 1190 | status = -EBUSY; |
| 1191 | goto err; |
| 1192 | } |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1193 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1194 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1195 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1196 | OPCODE_COMMON_GET_FLOW_CONTROL); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1197 | |
| 1198 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1199 | OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req)); |
| 1200 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1201 | status = be_mcc_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1202 | if (!status) { |
| 1203 | struct be_cmd_resp_get_flow_control *resp = |
| 1204 | embedded_payload(wrb); |
| 1205 | *tx_fc = le16_to_cpu(resp->tx_flow_control); |
| 1206 | *rx_fc = le16_to_cpu(resp->rx_flow_control); |
| 1207 | } |
| 1208 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1209 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1210 | spin_unlock_bh(&adapter->mcc_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1211 | return status; |
| 1212 | } |
| 1213 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1214 | /* Uses mbox */ |
Ajit Khaparde | dcb9b56 | 2009-09-30 21:58:22 -0700 | [diff] [blame] | 1215 | int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num, u32 *cap) |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1216 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1217 | struct be_mcc_wrb *wrb; |
| 1218 | struct be_cmd_req_query_fw_cfg *req; |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1219 | int status; |
| 1220 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1221 | spin_lock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1222 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1223 | wrb = wrb_from_mbox(adapter); |
| 1224 | req = embedded_payload(wrb); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1225 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1226 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1227 | OPCODE_COMMON_QUERY_FIRMWARE_CONFIG); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1228 | |
| 1229 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1230 | OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req)); |
| 1231 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1232 | status = be_mbox_notify_wait(adapter); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1233 | if (!status) { |
| 1234 | struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); |
| 1235 | *port_num = le32_to_cpu(resp->phys_port); |
Ajit Khaparde | dcb9b56 | 2009-09-30 21:58:22 -0700 | [diff] [blame] | 1236 | *cap = le32_to_cpu(resp->function_cap); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1237 | } |
| 1238 | |
Sathya Perla | 8788fdc | 2009-07-27 22:52:03 +0000 | [diff] [blame] | 1239 | spin_unlock(&adapter->mbox_lock); |
Sathya Perla | 6b7c5b9 | 2009-03-11 23:32:03 -0700 | [diff] [blame] | 1240 | return status; |
| 1241 | } |
sarveshwarb | 14074ea | 2009-08-05 13:05:24 -0700 | [diff] [blame] | 1242 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1243 | /* Uses mbox */ |
sarveshwarb | 14074ea | 2009-08-05 13:05:24 -0700 | [diff] [blame] | 1244 | int be_cmd_reset_function(struct be_adapter *adapter) |
| 1245 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1246 | struct be_mcc_wrb *wrb; |
| 1247 | struct be_cmd_req_hdr *req; |
sarveshwarb | 14074ea | 2009-08-05 13:05:24 -0700 | [diff] [blame] | 1248 | int status; |
| 1249 | |
| 1250 | spin_lock(&adapter->mbox_lock); |
| 1251 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1252 | wrb = wrb_from_mbox(adapter); |
| 1253 | req = embedded_payload(wrb); |
sarveshwarb | 14074ea | 2009-08-05 13:05:24 -0700 | [diff] [blame] | 1254 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1255 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1256 | OPCODE_COMMON_FUNCTION_RESET); |
sarveshwarb | 14074ea | 2009-08-05 13:05:24 -0700 | [diff] [blame] | 1257 | |
| 1258 | be_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, |
| 1259 | OPCODE_COMMON_FUNCTION_RESET, sizeof(*req)); |
| 1260 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1261 | status = be_mbox_notify_wait(adapter); |
sarveshwarb | 14074ea | 2009-08-05 13:05:24 -0700 | [diff] [blame] | 1262 | |
| 1263 | spin_unlock(&adapter->mbox_lock); |
| 1264 | return status; |
| 1265 | } |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 1266 | |
Sarveshwar Bandi | fad9ab2 | 2009-10-12 04:23:15 -0700 | [diff] [blame] | 1267 | /* Uses sync mcc */ |
| 1268 | int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, |
| 1269 | u8 bcn, u8 sts, u8 state) |
| 1270 | { |
| 1271 | struct be_mcc_wrb *wrb; |
| 1272 | struct be_cmd_req_enable_disable_beacon *req; |
| 1273 | int status; |
| 1274 | |
| 1275 | spin_lock_bh(&adapter->mcc_lock); |
| 1276 | |
| 1277 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1278 | if (!wrb) { |
| 1279 | status = -EBUSY; |
| 1280 | goto err; |
| 1281 | } |
Sarveshwar Bandi | fad9ab2 | 2009-10-12 04:23:15 -0700 | [diff] [blame] | 1282 | req = embedded_payload(wrb); |
| 1283 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1284 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1285 | OPCODE_COMMON_ENABLE_DISABLE_BEACON); |
Sarveshwar Bandi | fad9ab2 | 2009-10-12 04:23:15 -0700 | [diff] [blame] | 1286 | |
| 1287 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1288 | OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req)); |
| 1289 | |
| 1290 | req->port_num = port_num; |
| 1291 | req->beacon_state = state; |
| 1292 | req->beacon_duration = bcn; |
| 1293 | req->status_duration = sts; |
| 1294 | |
| 1295 | status = be_mcc_notify_wait(adapter); |
| 1296 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1297 | err: |
Sarveshwar Bandi | fad9ab2 | 2009-10-12 04:23:15 -0700 | [diff] [blame] | 1298 | spin_unlock_bh(&adapter->mcc_lock); |
| 1299 | return status; |
| 1300 | } |
| 1301 | |
| 1302 | /* Uses sync mcc */ |
| 1303 | int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state) |
| 1304 | { |
| 1305 | struct be_mcc_wrb *wrb; |
| 1306 | struct be_cmd_req_get_beacon_state *req; |
| 1307 | int status; |
| 1308 | |
| 1309 | spin_lock_bh(&adapter->mcc_lock); |
| 1310 | |
| 1311 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1312 | if (!wrb) { |
| 1313 | status = -EBUSY; |
| 1314 | goto err; |
| 1315 | } |
Sarveshwar Bandi | fad9ab2 | 2009-10-12 04:23:15 -0700 | [diff] [blame] | 1316 | req = embedded_payload(wrb); |
| 1317 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1318 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1319 | OPCODE_COMMON_GET_BEACON_STATE); |
Sarveshwar Bandi | fad9ab2 | 2009-10-12 04:23:15 -0700 | [diff] [blame] | 1320 | |
| 1321 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1322 | OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req)); |
| 1323 | |
| 1324 | req->port_num = port_num; |
| 1325 | |
| 1326 | status = be_mcc_notify_wait(adapter); |
| 1327 | if (!status) { |
| 1328 | struct be_cmd_resp_get_beacon_state *resp = |
| 1329 | embedded_payload(wrb); |
| 1330 | *state = resp->beacon_state; |
| 1331 | } |
| 1332 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1333 | err: |
Sarveshwar Bandi | fad9ab2 | 2009-10-12 04:23:15 -0700 | [diff] [blame] | 1334 | spin_unlock_bh(&adapter->mcc_lock); |
| 1335 | return status; |
| 1336 | } |
| 1337 | |
Sarveshwar Bandi | 0388f25 | 2009-10-28 04:15:20 -0700 | [diff] [blame] | 1338 | /* Uses sync mcc */ |
| 1339 | int be_cmd_read_port_type(struct be_adapter *adapter, u32 port, |
| 1340 | u8 *connector) |
| 1341 | { |
| 1342 | struct be_mcc_wrb *wrb; |
| 1343 | struct be_cmd_req_port_type *req; |
| 1344 | int status; |
| 1345 | |
| 1346 | spin_lock_bh(&adapter->mcc_lock); |
| 1347 | |
| 1348 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1349 | if (!wrb) { |
| 1350 | status = -EBUSY; |
| 1351 | goto err; |
| 1352 | } |
Sarveshwar Bandi | 0388f25 | 2009-10-28 04:15:20 -0700 | [diff] [blame] | 1353 | req = embedded_payload(wrb); |
| 1354 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1355 | be_wrb_hdr_prepare(wrb, sizeof(struct be_cmd_resp_port_type), true, 0, |
| 1356 | OPCODE_COMMON_READ_TRANSRECV_DATA); |
Sarveshwar Bandi | 0388f25 | 2009-10-28 04:15:20 -0700 | [diff] [blame] | 1357 | |
| 1358 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1359 | OPCODE_COMMON_READ_TRANSRECV_DATA, sizeof(*req)); |
| 1360 | |
| 1361 | req->port = cpu_to_le32(port); |
| 1362 | req->page_num = cpu_to_le32(TR_PAGE_A0); |
| 1363 | status = be_mcc_notify_wait(adapter); |
| 1364 | if (!status) { |
| 1365 | struct be_cmd_resp_port_type *resp = embedded_payload(wrb); |
| 1366 | *connector = resp->data.connector; |
| 1367 | } |
| 1368 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1369 | err: |
Sarveshwar Bandi | 0388f25 | 2009-10-28 04:15:20 -0700 | [diff] [blame] | 1370 | spin_unlock_bh(&adapter->mcc_lock); |
| 1371 | return status; |
| 1372 | } |
| 1373 | |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 1374 | int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, |
| 1375 | u32 flash_type, u32 flash_opcode, u32 buf_size) |
| 1376 | { |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1377 | struct be_mcc_wrb *wrb; |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 1378 | struct be_cmd_write_flashrom *req = cmd->va; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1379 | struct be_sge *sge; |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 1380 | int status; |
| 1381 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1382 | spin_lock_bh(&adapter->mcc_lock); |
| 1383 | |
| 1384 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1385 | if (!wrb) { |
| 1386 | status = -EBUSY; |
| 1387 | goto err; |
| 1388 | } |
| 1389 | req = cmd->va; |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1390 | sge = nonembedded_sgl(wrb); |
| 1391 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1392 | be_wrb_hdr_prepare(wrb, cmd->size, false, 1, |
| 1393 | OPCODE_COMMON_WRITE_FLASHROM); |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 1394 | |
| 1395 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1396 | OPCODE_COMMON_WRITE_FLASHROM, cmd->size); |
| 1397 | sge->pa_hi = cpu_to_le32(upper_32_bits(cmd->dma)); |
| 1398 | sge->pa_lo = cpu_to_le32(cmd->dma & 0xFFFFFFFF); |
| 1399 | sge->len = cpu_to_le32(cmd->size); |
| 1400 | |
| 1401 | req->params.op_type = cpu_to_le32(flash_type); |
| 1402 | req->params.op_code = cpu_to_le32(flash_opcode); |
| 1403 | req->params.data_buf_size = cpu_to_le32(buf_size); |
| 1404 | |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1405 | status = be_mcc_notify_wait(adapter); |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 1406 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1407 | err: |
Sathya Perla | b31c50a | 2009-09-17 10:30:13 -0700 | [diff] [blame] | 1408 | spin_unlock_bh(&adapter->mcc_lock); |
Ajit Khaparde | 8451748 | 2009-09-04 03:12:16 +0000 | [diff] [blame] | 1409 | return status; |
| 1410 | } |
Sarveshwar Bandi | fa9a6fe | 2009-11-20 14:23:47 -0800 | [diff] [blame] | 1411 | |
| 1412 | int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc) |
| 1413 | { |
| 1414 | struct be_mcc_wrb *wrb; |
| 1415 | struct be_cmd_write_flashrom *req; |
| 1416 | int status; |
| 1417 | |
| 1418 | spin_lock_bh(&adapter->mcc_lock); |
| 1419 | |
| 1420 | wrb = wrb_from_mccq(adapter); |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1421 | if (!wrb) { |
| 1422 | status = -EBUSY; |
| 1423 | goto err; |
| 1424 | } |
Sarveshwar Bandi | fa9a6fe | 2009-11-20 14:23:47 -0800 | [diff] [blame] | 1425 | req = embedded_payload(wrb); |
| 1426 | |
Ajit Khaparde | d744b44 | 2009-12-03 06:12:06 +0000 | [diff] [blame] | 1427 | be_wrb_hdr_prepare(wrb, sizeof(*req)+4, true, 0, |
| 1428 | OPCODE_COMMON_READ_FLASHROM); |
Sarveshwar Bandi | fa9a6fe | 2009-11-20 14:23:47 -0800 | [diff] [blame] | 1429 | |
| 1430 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
| 1431 | OPCODE_COMMON_READ_FLASHROM, sizeof(*req)+4); |
| 1432 | |
| 1433 | req->params.op_type = cpu_to_le32(FLASHROM_TYPE_REDBOOT); |
| 1434 | req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT); |
| 1435 | req->params.offset = 0x3FFFC; |
| 1436 | req->params.data_buf_size = 0x4; |
| 1437 | |
| 1438 | status = be_mcc_notify_wait(adapter); |
| 1439 | if (!status) |
| 1440 | memcpy(flashed_crc, req->params.data_buf, 4); |
| 1441 | |
Sathya Perla | 713d0394 | 2009-11-22 22:02:45 +0000 | [diff] [blame] | 1442 | err: |
Sarveshwar Bandi | fa9a6fe | 2009-11-20 14:23:47 -0800 | [diff] [blame] | 1443 | spin_unlock_bh(&adapter->mcc_lock); |
| 1444 | return status; |
| 1445 | } |
Ajit Khaparde | 71d8d1b | 2009-12-03 06:16:59 +0000 | [diff] [blame] | 1446 | |
| 1447 | extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, |
| 1448 | struct be_dma_mem *nonemb_cmd) |
| 1449 | { |
| 1450 | struct be_mcc_wrb *wrb; |
| 1451 | struct be_cmd_req_acpi_wol_magic_config *req; |
| 1452 | struct be_sge *sge; |
| 1453 | int status; |
| 1454 | |
| 1455 | spin_lock_bh(&adapter->mcc_lock); |
| 1456 | |
| 1457 | wrb = wrb_from_mccq(adapter); |
| 1458 | if (!wrb) { |
| 1459 | status = -EBUSY; |
| 1460 | goto err; |
| 1461 | } |
| 1462 | req = nonemb_cmd->va; |
| 1463 | sge = nonembedded_sgl(wrb); |
| 1464 | |
| 1465 | be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1, |
| 1466 | OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG); |
| 1467 | |
| 1468 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, |
| 1469 | OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req)); |
| 1470 | memcpy(req->magic_mac, mac, ETH_ALEN); |
| 1471 | |
| 1472 | sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma)); |
| 1473 | sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF); |
| 1474 | sge->len = cpu_to_le32(nonemb_cmd->size); |
| 1475 | |
| 1476 | status = be_mcc_notify_wait(adapter); |
| 1477 | |
| 1478 | err: |
| 1479 | spin_unlock_bh(&adapter->mcc_lock); |
| 1480 | return status; |
| 1481 | } |
Suresh R | ff33a6e | 2009-12-03 16:15:52 -0800 | [diff] [blame] | 1482 | |
Sarveshwar Bandi | fced999 | 2009-12-23 04:41:44 +0000 | [diff] [blame] | 1483 | int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num, |
| 1484 | u8 loopback_type, u8 enable) |
| 1485 | { |
| 1486 | struct be_mcc_wrb *wrb; |
| 1487 | struct be_cmd_req_set_lmode *req; |
| 1488 | int status; |
| 1489 | |
| 1490 | spin_lock_bh(&adapter->mcc_lock); |
| 1491 | |
| 1492 | wrb = wrb_from_mccq(adapter); |
| 1493 | if (!wrb) { |
| 1494 | status = -EBUSY; |
| 1495 | goto err; |
| 1496 | } |
| 1497 | |
| 1498 | req = embedded_payload(wrb); |
| 1499 | |
| 1500 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1501 | OPCODE_LOWLEVEL_SET_LOOPBACK_MODE); |
| 1502 | |
| 1503 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, |
| 1504 | OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, |
| 1505 | sizeof(*req)); |
| 1506 | |
| 1507 | req->src_port = port_num; |
| 1508 | req->dest_port = port_num; |
| 1509 | req->loopback_type = loopback_type; |
| 1510 | req->loopback_state = enable; |
| 1511 | |
| 1512 | status = be_mcc_notify_wait(adapter); |
| 1513 | err: |
| 1514 | spin_unlock_bh(&adapter->mcc_lock); |
| 1515 | return status; |
| 1516 | } |
| 1517 | |
Suresh R | ff33a6e | 2009-12-03 16:15:52 -0800 | [diff] [blame] | 1518 | int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, |
| 1519 | u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) |
| 1520 | { |
| 1521 | struct be_mcc_wrb *wrb; |
| 1522 | struct be_cmd_req_loopback_test *req; |
| 1523 | int status; |
| 1524 | |
| 1525 | spin_lock_bh(&adapter->mcc_lock); |
| 1526 | |
| 1527 | wrb = wrb_from_mccq(adapter); |
| 1528 | if (!wrb) { |
| 1529 | status = -EBUSY; |
| 1530 | goto err; |
| 1531 | } |
| 1532 | |
| 1533 | req = embedded_payload(wrb); |
| 1534 | |
| 1535 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0, |
| 1536 | OPCODE_LOWLEVEL_LOOPBACK_TEST); |
| 1537 | |
| 1538 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, |
| 1539 | OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req)); |
Sarveshwar Bandi | d7b9014 | 2009-12-23 04:40:36 +0000 | [diff] [blame] | 1540 | req->hdr.timeout = 4; |
Suresh R | ff33a6e | 2009-12-03 16:15:52 -0800 | [diff] [blame] | 1541 | |
| 1542 | req->pattern = cpu_to_le64(pattern); |
| 1543 | req->src_port = cpu_to_le32(port_num); |
| 1544 | req->dest_port = cpu_to_le32(port_num); |
| 1545 | req->pkt_size = cpu_to_le32(pkt_size); |
| 1546 | req->num_pkts = cpu_to_le32(num_pkts); |
| 1547 | req->loopback_type = cpu_to_le32(loopback_type); |
| 1548 | |
| 1549 | status = be_mcc_notify_wait(adapter); |
| 1550 | if (!status) { |
| 1551 | struct be_cmd_resp_loopback_test *resp = embedded_payload(wrb); |
| 1552 | status = le32_to_cpu(resp->status); |
| 1553 | } |
| 1554 | |
| 1555 | err: |
| 1556 | spin_unlock_bh(&adapter->mcc_lock); |
| 1557 | return status; |
| 1558 | } |
| 1559 | |
| 1560 | int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, |
| 1561 | u32 byte_cnt, struct be_dma_mem *cmd) |
| 1562 | { |
| 1563 | struct be_mcc_wrb *wrb; |
| 1564 | struct be_cmd_req_ddrdma_test *req; |
| 1565 | struct be_sge *sge; |
| 1566 | int status; |
| 1567 | int i, j = 0; |
| 1568 | |
| 1569 | spin_lock_bh(&adapter->mcc_lock); |
| 1570 | |
| 1571 | wrb = wrb_from_mccq(adapter); |
| 1572 | if (!wrb) { |
| 1573 | status = -EBUSY; |
| 1574 | goto err; |
| 1575 | } |
| 1576 | req = cmd->va; |
| 1577 | sge = nonembedded_sgl(wrb); |
| 1578 | be_wrb_hdr_prepare(wrb, cmd->size, false, 1, |
| 1579 | OPCODE_LOWLEVEL_HOST_DDR_DMA); |
| 1580 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, |
| 1581 | OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size); |
| 1582 | |
| 1583 | sge->pa_hi = cpu_to_le32(upper_32_bits(cmd->dma)); |
| 1584 | sge->pa_lo = cpu_to_le32(cmd->dma & 0xFFFFFFFF); |
| 1585 | sge->len = cpu_to_le32(cmd->size); |
| 1586 | |
| 1587 | req->pattern = cpu_to_le64(pattern); |
| 1588 | req->byte_count = cpu_to_le32(byte_cnt); |
| 1589 | for (i = 0; i < byte_cnt; i++) { |
| 1590 | req->snd_buff[i] = (u8)(pattern >> (j*8)); |
| 1591 | j++; |
| 1592 | if (j > 7) |
| 1593 | j = 0; |
| 1594 | } |
| 1595 | |
| 1596 | status = be_mcc_notify_wait(adapter); |
| 1597 | |
| 1598 | if (!status) { |
| 1599 | struct be_cmd_resp_ddrdma_test *resp; |
| 1600 | resp = cmd->va; |
| 1601 | if ((memcmp(resp->rcv_buff, req->snd_buff, byte_cnt) != 0) || |
| 1602 | resp->snd_err) { |
| 1603 | status = -1; |
| 1604 | } |
| 1605 | } |
| 1606 | |
| 1607 | err: |
| 1608 | spin_unlock_bh(&adapter->mcc_lock); |
| 1609 | return status; |
| 1610 | } |