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Sergei Shtylyovf138e542015-10-01 02:02:27 +03001/*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12#include "r8a7791.dtsi"
13
14/ {
15 model = "Porter";
16 compatible = "renesas,porter", "renesas,r8a7791";
17
18 aliases {
19 serial0 = &scif0;
20 };
21
22 chosen {
Sergei Shtylyov08770982015-10-06 01:51:01 +030023 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
Sergei Shtylyovf138e542015-10-01 02:02:27 +030024 stdout-path = &scif0;
25 };
26
27 memory@40000000 {
28 device_type = "memory";
29 reg = <0 0x40000000 0 0x40000000>;
30 };
31
32 memory@200000000 {
33 device_type = "memory";
34 reg = <2 0x00000000 0 0x40000000>;
35 };
36};
37
38&extal_clk {
39 clock-frequency = <20000000>;
40};
41
42&pfc {
43 scif0_pins: serial0 {
44 renesas,groups = "scif0_data_d";
45 renesas,function = "scif0";
46 };
Sergei Shtylyov08770982015-10-06 01:51:01 +030047
48 ether_pins: ether {
49 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
50 renesas,function = "eth";
51 };
52
53 phy1_pins: phy1 {
54 renesas,groups = "intc_irq0";
55 renesas,function = "intc";
56 };
Sergei Shtylyovf138e542015-10-01 02:02:27 +030057};
58
59&scif0 {
60 pinctrl-0 = <&scif0_pins>;
61 pinctrl-names = "default";
62
63 status = "okay";
64};
Sergei Shtylyov08770982015-10-06 01:51:01 +030065
66&ether {
67 pinctrl-0 = <&ether_pins &phy1_pins>;
68 pinctrl-names = "default";
69
70 phy-handle = <&phy1>;
71 renesas,ether-link-active-low;
72 status = "ok";
73
74 phy1: ethernet-phy@1 {
75 reg = <1>;
76 interrupt-parent = <&irqc0>;
77 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
78 micrel,led-mode = <1>;
79 };
80};