blob: 85e621ab2968d2947bf0b6dac96a305d5afbf614 [file] [log] [blame]
Grant Likely8e267f32011-07-19 17:26:54 -06001/dts-v1/;
2
Grant Likely8e267f32011-07-19 17:26:54 -06003/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Seaboard";
7 compatible = "nvidia,seaboard", "nvidia,tegra20";
8
Grant Likely8e267f32011-07-19 17:26:54 -06009 memory {
Stephen Warren95decf82012-05-11 16:11:38 -060010 reg = <0x00000000 0x40000000>;
Grant Likely8e267f32011-07-19 17:26:54 -060011 };
12
Stephen Warrenf9eb26a2012-05-11 16:17:47 -060013 pinmux {
Stephen Warrenecc295b2012-03-15 16:27:36 -060014 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
16
17 state_default: pinmux {
18 ata {
19 nvidia,pins = "ata";
20 nvidia,function = "ide";
21 };
22 atb {
23 nvidia,pins = "atb", "gma", "gme";
24 nvidia,function = "sdio4";
25 };
26 atc {
27 nvidia,pins = "atc";
28 nvidia,function = "nand";
29 };
30 atd {
31 nvidia,pins = "atd", "ate", "gmb", "spia",
32 "spib", "spic";
33 nvidia,function = "gmi";
34 };
35 cdev1 {
36 nvidia,pins = "cdev1";
37 nvidia,function = "plla_out";
38 };
39 cdev2 {
40 nvidia,pins = "cdev2";
41 nvidia,function = "pllp_out4";
42 };
43 crtp {
44 nvidia,pins = "crtp", "lm1";
45 nvidia,function = "crt";
46 };
47 csus {
48 nvidia,pins = "csus";
49 nvidia,function = "vi_sensor_clk";
50 };
51 dap1 {
52 nvidia,pins = "dap1";
53 nvidia,function = "dap1";
54 };
55 dap2 {
56 nvidia,pins = "dap2";
57 nvidia,function = "dap2";
58 };
59 dap3 {
60 nvidia,pins = "dap3";
61 nvidia,function = "dap3";
62 };
63 dap4 {
64 nvidia,pins = "dap4";
65 nvidia,function = "dap4";
66 };
Stephen Warrenecc295b2012-03-15 16:27:36 -060067 dta {
68 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
69 nvidia,function = "vi";
70 };
71 dtf {
72 nvidia,pins = "dtf";
73 nvidia,function = "i2c3";
74 };
75 gmc {
76 nvidia,pins = "gmc";
77 nvidia,function = "uartd";
78 };
79 gmd {
80 nvidia,pins = "gmd";
81 nvidia,function = "sflash";
82 };
83 gpu {
84 nvidia,pins = "gpu";
85 nvidia,function = "pwm";
86 };
87 gpu7 {
88 nvidia,pins = "gpu7";
89 nvidia,function = "rtck";
90 };
91 gpv {
92 nvidia,pins = "gpv", "slxa", "slxk";
93 nvidia,function = "pcie";
94 };
95 hdint {
96 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
Stephen Warren802a8492012-04-26 11:21:54 -060097 "lsck", "lsda";
Stephen Warrenecc295b2012-03-15 16:27:36 -060098 nvidia,function = "hdmi";
99 };
100 i2cp {
101 nvidia,pins = "i2cp";
102 nvidia,function = "i2cp";
103 };
104 irrx {
105 nvidia,pins = "irrx", "irtx";
106 nvidia,function = "uartb";
107 };
108 kbca {
109 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
110 "kbce", "kbcf";
111 nvidia,function = "kbc";
112 };
113 lcsn {
114 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
115 "lsdi", "lvp0";
116 nvidia,function = "rsvd4";
117 };
118 ld0 {
119 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
120 "ld5", "ld6", "ld7", "ld8", "ld9",
121 "ld10", "ld11", "ld12", "ld13", "ld14",
122 "ld15", "ld16", "ld17", "ldi", "lhp0",
123 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
124 "lspi", "lvp1", "lvs";
125 nvidia,function = "displaya";
126 };
Stephen Warrena18cf6d2012-04-16 17:41:17 -0600127 owc {
128 nvidia,pins = "owc", "spdi", "spdo", "uac";
129 nvidia,function = "rsvd2";
130 };
Stephen Warrenecc295b2012-03-15 16:27:36 -0600131 pmc {
132 nvidia,pins = "pmc";
133 nvidia,function = "pwr_on";
134 };
135 rm {
136 nvidia,pins = "rm";
137 nvidia,function = "i2c1";
138 };
139 sdb {
140 nvidia,pins = "sdb", "sdc", "sdd";
141 nvidia,function = "sdio3";
142 };
143 sdio1 {
144 nvidia,pins = "sdio1";
145 nvidia,function = "sdio1";
146 };
147 slxc {
148 nvidia,pins = "slxc", "slxd";
149 nvidia,function = "spdif";
150 };
151 spid {
152 nvidia,pins = "spid", "spie", "spif";
153 nvidia,function = "spi1";
154 };
155 spig {
156 nvidia,pins = "spig", "spih";
157 nvidia,function = "spi2_alt";
158 };
159 uaa {
160 nvidia,pins = "uaa", "uab", "uda";
161 nvidia,function = "ulpi";
162 };
163 uad {
164 nvidia,pins = "uad";
165 nvidia,function = "irda";
166 };
167 uca {
168 nvidia,pins = "uca", "ucb";
169 nvidia,function = "uartc";
170 };
171 conf_ata {
172 nvidia,pins = "ata", "atb", "atc", "atd",
173 "cdev1", "cdev2", "dap1", "dap2",
Stephen Warrena18cf6d2012-04-16 17:41:17 -0600174 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
Stephen Warrenecc295b2012-03-15 16:27:36 -0600175 "gme", "gpu", "gpu7", "i2cp", "irrx",
176 "irtx", "pta", "rm", "sdc", "sdd",
177 "slxd", "slxk", "spdi", "spdo", "uac",
178 "uad", "uca", "ucb", "uda";
179 nvidia,pull = <0>;
180 nvidia,tristate = <0>;
181 };
182 conf_ate {
Stephen Warrena18cf6d2012-04-16 17:41:17 -0600183 nvidia,pins = "ate", "csus", "dap3",
Stephen Warrenecc295b2012-03-15 16:27:36 -0600184 "gpv", "owc", "slxc", "spib", "spid",
185 "spie";
186 nvidia,pull = <0>;
187 nvidia,tristate = <1>;
188 };
189 conf_ck32 {
190 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
191 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
192 nvidia,pull = <0>;
193 };
194 conf_crtp {
195 nvidia,pins = "crtp", "gmb", "slxa", "spia",
196 "spig", "spih";
197 nvidia,pull = <2>;
198 nvidia,tristate = <1>;
199 };
200 conf_dta {
201 nvidia,pins = "dta", "dtb", "dtc", "dtd";
202 nvidia,pull = <1>;
203 nvidia,tristate = <0>;
204 };
205 conf_dte {
206 nvidia,pins = "dte", "spif";
207 nvidia,pull = <1>;
208 nvidia,tristate = <1>;
209 };
210 conf_hdint {
211 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
212 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
213 "lvp0";
214 nvidia,tristate = <1>;
215 };
216 conf_kbca {
217 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
218 "kbce", "kbcf", "sdio1", "spic", "uaa",
219 "uab";
220 nvidia,pull = <2>;
221 nvidia,tristate = <0>;
222 };
223 conf_lc {
224 nvidia,pins = "lc", "ls";
225 nvidia,pull = <2>;
226 };
227 conf_ld0 {
228 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
229 "ld5", "ld6", "ld7", "ld8", "ld9",
230 "ld10", "ld11", "ld12", "ld13", "ld14",
231 "ld15", "ld16", "ld17", "ldi", "lhp0",
232 "lhp1", "lhp2", "lhs", "lm0", "lpp",
233 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
234 "lvs", "pmc", "sdb";
235 nvidia,tristate = <0>;
236 };
237 conf_ld17_0 {
238 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
239 "ld23_22";
240 nvidia,pull = <1>;
241 };
242 drive_sdio1 {
243 nvidia,pins = "drive_sdio1";
244 nvidia,high-speed-mode = <0>;
245 nvidia,schmitt = <0>;
246 nvidia,low-power-mode = <3>;
247 nvidia,pull-down-strength = <31>;
248 nvidia,pull-up-strength = <31>;
249 nvidia,slew-rate-rising = <3>;
250 nvidia,slew-rate-falling = <3>;
251 };
252 };
Stephen Warrena18cf6d2012-04-16 17:41:17 -0600253
254 state_i2cmux_ddc: pinmux_i2cmux_ddc {
255 ddc {
256 nvidia,pins = "ddc";
257 nvidia,function = "i2c2";
258 };
259 pta {
260 nvidia,pins = "pta";
261 nvidia,function = "rsvd4";
262 };
263 };
264
265 state_i2cmux_pta: pinmux_i2cmux_pta {
266 ddc {
267 nvidia,pins = "ddc";
268 nvidia,function = "rsvd4";
269 };
270 pta {
271 nvidia,pins = "pta";
272 nvidia,function = "i2c2";
273 };
274 };
275
276 state_i2cmux_idle: pinmux_i2cmux_idle {
277 ddc {
278 nvidia,pins = "ddc";
279 nvidia,function = "rsvd4";
280 };
281 pta {
282 nvidia,pins = "pta";
283 nvidia,function = "rsvd4";
284 };
285 };
Stephen Warrenecc295b2012-03-15 16:27:36 -0600286 };
287
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600288 i2s@70002800 {
289 status = "okay";
Stephen Warrenc04abb32012-05-11 17:03:26 -0600290 };
291
292 serial@70006300 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600293 status = "okay";
Stephen Warrenc04abb32012-05-11 17:03:26 -0600294 clock-frequency = <216000000>;
295 };
296
Stephen Warren88950f3b2011-11-21 14:44:09 -0700297 i2c@7000c000 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600298 status = "okay";
Stephen Warren88950f3b2011-11-21 14:44:09 -0700299 clock-frequency = <400000>;
Stephen Warren797acf72012-01-11 16:09:57 -0700300
301 wm8903: wm8903@1a {
302 compatible = "wlf,wm8903";
303 reg = <0x1a>;
304 interrupt-parent = <&gpio>;
Stephen Warren95decf82012-05-11 16:11:38 -0600305 interrupts = <187 0x04>;
Stephen Warren797acf72012-01-11 16:09:57 -0700306
307 gpio-controller;
308 #gpio-cells = <2>;
309
310 micdet-cfg = <0>;
311 micdet-delay = <100>;
Stephen Warren95decf82012-05-11 16:11:38 -0600312 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
Stephen Warren797acf72012-01-11 16:09:57 -0700313 };
Laxman Dewanganb46b0b52012-04-23 17:41:36 +0530314
315 /* ALS and proximity sensor */
316 isl29018@44 {
317 compatible = "isil,isl29018";
318 reg = <0x44>;
319 interrupt-parent = <&gpio>;
Stephen Warren95decf82012-05-11 16:11:38 -0600320 interrupts = <202 0x04>; /* GPIO PZ2 */
Laxman Dewanganb46b0b52012-04-23 17:41:36 +0530321 };
Olof Johansson45dbe9d2011-12-22 16:33:13 +0000322
323 gyrometer@68 {
324 compatible = "invn,mpu3050";
325 reg = <0x68>;
326 interrupt-parent = <&gpio>;
327 interrupts = <204 0x04>; /* gpio PZ4 */
328 };
Stephen Warren88950f3b2011-11-21 14:44:09 -0700329 };
330
331 i2c@7000c400 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600332 status = "okay";
Stephen Warren22bd1f72012-04-26 11:19:03 -0600333 clock-frequency = <100000>;
Stephen Warren88950f3b2011-11-21 14:44:09 -0700334 };
335
Stephen Warrena18cf6d2012-04-16 17:41:17 -0600336 i2cmux {
337 compatible = "i2c-mux-pinctrl";
338 #address-cells = <1>;
339 #size-cells = <0>;
340
341 i2c-parent = <&{/i2c@7000c400}>;
342
343 pinctrl-names = "ddc", "pta", "idle";
344 pinctrl-0 = <&state_i2cmux_ddc>;
345 pinctrl-1 = <&state_i2cmux_pta>;
346 pinctrl-2 = <&state_i2cmux_idle>;
347
348 i2c@0 {
349 reg = <0>;
350 #address-cells = <1>;
351 #size-cells = <0>;
352 };
353
354 i2c@1 {
355 reg = <1>;
356 #address-cells = <1>;
357 #size-cells = <0>;
Stephen Warren0879c5f2012-04-25 16:57:28 -0600358
359 smart-battery@b {
360 compatible = "ti,bq20z75", "smart-battery-1.1";
361 reg = <0xb>;
362 ti,i2c-retry-count = <2>;
363 ti,poll-retry-count = <10>;
364 };
Stephen Warrena18cf6d2012-04-16 17:41:17 -0600365 };
366 };
367
Stephen Warren88950f3b2011-11-21 14:44:09 -0700368 i2c@7000c500 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600369 status = "okay";
Stephen Warren88950f3b2011-11-21 14:44:09 -0700370 clock-frequency = <400000>;
371 };
372
373 i2c@7000d000 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600374 status = "okay";
Stephen Warren88950f3b2011-11-21 14:44:09 -0700375 clock-frequency = <400000>;
Stephen Warren401c9a52011-12-17 23:29:32 -0700376
Olof Johansson45dbe9d2011-12-22 16:33:13 +0000377 temperature-sensor@4c {
378 compatible = "nct1008";
Stephen Warren401c9a52011-12-17 23:29:32 -0700379 reg = <0x4c>;
380 };
Olof Johansson45dbe9d2011-12-22 16:33:13 +0000381
382 magnetometer@c {
383 compatible = "ak8975";
384 reg = <0xc>;
385 interrupt-parent = <&gpio>;
386 interrupts = <109 0x04>; /* gpio PN5 */
387 };
Stephen Warren88950f3b2011-11-21 14:44:09 -0700388 };
389
hdoyu@nvidia.combfb3fe12012-05-16 19:47:46 +0000390 memory-controller@0x7000f400 {
Olof Johanssond8017a92011-10-18 11:06:06 -0700391 emc-table@190000 {
Stephen Warren95decf82012-05-11 16:11:38 -0600392 reg = <190000>;
Olof Johanssond8017a92011-10-18 11:06:06 -0700393 compatible = "nvidia,tegra20-emc-table";
Stephen Warren95decf82012-05-11 16:11:38 -0600394 clock-frequency = <190000>;
395 nvidia,emc-registers = <0x0000000c 0x00000026
Olof Johanssond8017a92011-10-18 11:06:06 -0700396 0x00000009 0x00000003 0x00000004 0x00000004
397 0x00000002 0x0000000c 0x00000003 0x00000003
398 0x00000002 0x00000001 0x00000004 0x00000005
399 0x00000004 0x00000009 0x0000000d 0x0000059f
400 0x00000000 0x00000003 0x00000003 0x00000003
401 0x00000003 0x00000001 0x0000000b 0x000000c8
402 0x00000003 0x00000007 0x00000004 0x0000000f
403 0x00000002 0x00000000 0x00000000 0x00000002
404 0x00000000 0x00000000 0x00000083 0xa06204ae
405 0x007dc010 0x00000000 0x00000000 0x00000000
Stephen Warren95decf82012-05-11 16:11:38 -0600406 0x00000000 0x00000000 0x00000000 0x00000000>;
Olof Johanssond8017a92011-10-18 11:06:06 -0700407 };
408
409 emc-table@380000 {
Stephen Warren95decf82012-05-11 16:11:38 -0600410 reg = <380000>;
Olof Johanssond8017a92011-10-18 11:06:06 -0700411 compatible = "nvidia,tegra20-emc-table";
Stephen Warren95decf82012-05-11 16:11:38 -0600412 clock-frequency = <380000>;
413 nvidia,emc-registers = <0x00000017 0x0000004b
Olof Johanssond8017a92011-10-18 11:06:06 -0700414 0x00000012 0x00000006 0x00000004 0x00000005
415 0x00000003 0x0000000c 0x00000006 0x00000006
416 0x00000003 0x00000001 0x00000004 0x00000005
417 0x00000004 0x00000009 0x0000000d 0x00000b5f
418 0x00000000 0x00000003 0x00000003 0x00000006
419 0x00000006 0x00000001 0x00000011 0x000000c8
420 0x00000003 0x0000000e 0x00000007 0x0000000f
421 0x00000002 0x00000000 0x00000000 0x00000002
422 0x00000000 0x00000000 0x00000083 0xe044048b
423 0x007d8010 0x00000000 0x00000000 0x00000000
Stephen Warren95decf82012-05-11 16:11:38 -0600424 0x00000000 0x00000000 0x00000000 0x00000000>;
Olof Johanssond8017a92011-10-18 11:06:06 -0700425 };
426 };
Stephen Warrenaa607eb2012-04-12 15:46:49 -0600427
Stephen Warrenc04abb32012-05-11 17:03:26 -0600428 usb@c5000000 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600429 status = "okay";
Stephen Warrenc04abb32012-05-11 17:03:26 -0600430 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
431 dr_mode = "otg";
432 };
433
Stephen Warrenaa607eb2012-04-12 15:46:49 -0600434 usb@c5004000 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600435 status = "okay";
Stephen Warrenaa607eb2012-04-12 15:46:49 -0600436 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
437 };
Stephen Warrenc04abb32012-05-11 17:03:26 -0600438
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600439 usb@c5008000 {
440 status = "okay";
Stephen Warrenc04abb32012-05-11 17:03:26 -0600441 };
442
443 sdhci@c8000400 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600444 status = "okay";
Stephen Warrenc04abb32012-05-11 17:03:26 -0600445 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
446 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
447 power-gpios = <&gpio 70 0>; /* gpio PI6 */
Arnd Bergmann7f217792012-05-13 00:14:24 -0400448 bus-width = <4>;
Stephen Warrenc04abb32012-05-11 17:03:26 -0600449 };
450
451 sdhci@c8000600 {
Stephen Warren2a5fdc92012-05-11 17:32:56 -0600452 status = "okay";
Arnd Bergmann7f217792012-05-13 00:14:24 -0400453 bus-width = <8>;
Stephen Warrenc04abb32012-05-11 17:03:26 -0600454 };
455
456 gpio-keys {
457 compatible = "gpio-keys";
458
459 power {
460 label = "Power";
461 gpios = <&gpio 170 1>; /* gpio PV2, active low */
462 linux,code = <116>; /* KEY_POWER */
463 gpio-key,wakeup;
464 };
465
466 lid {
467 label = "Lid";
468 gpios = <&gpio 23 0>; /* gpio PC7 */
469 linux,input-type = <5>; /* EV_SW */
470 linux,code = <0>; /* SW_LID */
471 debounce-interval = <1>;
472 gpio-key,wakeup;
473 };
474 };
475
476 sound {
477 compatible = "nvidia,tegra-audio-wm8903-seaboard",
478 "nvidia,tegra-audio-wm8903";
479 nvidia,model = "NVIDIA Tegra Seaboard";
480
481 nvidia,audio-routing =
482 "Headphone Jack", "HPOUTR",
483 "Headphone Jack", "HPOUTL",
484 "Int Spk", "ROP",
485 "Int Spk", "RON",
486 "Int Spk", "LOP",
487 "Int Spk", "LON",
488 "Mic Jack", "MICBIAS",
489 "IN1R", "Mic Jack";
490
491 nvidia,i2s-controller = <&tegra_i2s1>;
492 nvidia,audio-codec = <&wm8903>;
493
494 nvidia,spkr-en-gpios = <&wm8903 2 0>;
495 nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
496 };
Grant Likely8e267f32011-07-19 17:26:54 -0600497};