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Ola Liljac0af14d2012-04-20 11:32:59 +02001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL), version 2
5 */
6
7#include <linux/platform_device.h>
8#include <linux/init.h>
9#include <linux/gpio.h>
10#include <plat/gpio-nomadik.h>
11
12#include <plat/pincfg.h>
13#include <plat/ste_dma40.h>
14
15#include <mach/devices.h>
16#include <ste-dma40-db8500.h>
17#include <mach/hardware.h>
18#include <mach/irqs.h>
19#include <mach/msp.h>
20
21#include "board-mop500.h"
22#include "devices-db8500.h"
23#include "pins-db8500.h"
24
25/* MSP1/3 Tx/Rx usage protection */
26static DEFINE_SPINLOCK(msp_rxtx_lock);
27
28/* Reference Count */
29static int msp_rxtx_ref;
30
31static pin_cfg_t mop500_msp1_pins_init[] = {
32 GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_DISABLE,
33 GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
34 GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
35 GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_DISABLE,
36};
37
38static pin_cfg_t mop500_msp1_pins_exit[] = {
39 GPIO33_MSP1_TXD | PIN_OUTPUT_LOW | PIN_SLPM_WAKEUP_ENABLE,
40 GPIO34_MSP1_TFS | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
41 GPIO35_MSP1_TCK | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
42 GPIO36_MSP1_RXD | PIN_INPUT_NOPULL | PIN_SLPM_WAKEUP_ENABLE,
43};
44
45int msp13_i2s_init(void)
46{
47 int retval = 0;
48 unsigned long flags;
49
50 spin_lock_irqsave(&msp_rxtx_lock, flags);
51 if (msp_rxtx_ref == 0)
52 retval = nmk_config_pins(
53 ARRAY_AND_SIZE(mop500_msp1_pins_init));
54 if (!retval)
55 msp_rxtx_ref++;
56 spin_unlock_irqrestore(&msp_rxtx_lock, flags);
57
58 return retval;
59}
60
61int msp13_i2s_exit(void)
62{
63 int retval = 0;
64 unsigned long flags;
65
66 spin_lock_irqsave(&msp_rxtx_lock, flags);
67 WARN_ON(!msp_rxtx_ref);
68 msp_rxtx_ref--;
69 if (msp_rxtx_ref == 0)
70 retval = nmk_config_pins_sleep(
71 ARRAY_AND_SIZE(mop500_msp1_pins_exit));
72 spin_unlock_irqrestore(&msp_rxtx_lock, flags);
73
74 return retval;
75}
76
77static struct stedma40_chan_cfg msp0_dma_rx = {
78 .high_priority = true,
79 .dir = STEDMA40_PERIPH_TO_MEM,
80
81 .src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX,
82 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
83
84 .src_info.psize = STEDMA40_PSIZE_LOG_4,
85 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
86
87 /* data_width is set during configuration */
88};
89
90static struct stedma40_chan_cfg msp0_dma_tx = {
91 .high_priority = true,
92 .dir = STEDMA40_MEM_TO_PERIPH,
93
94 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
95 .dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX,
96
97 .src_info.psize = STEDMA40_PSIZE_LOG_4,
98 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
99
100 /* data_width is set during configuration */
101};
102
103static struct msp_i2s_platform_data msp0_platform_data = {
104 .id = MSP_I2S_0,
105 .msp_i2s_dma_rx = &msp0_dma_rx,
106 .msp_i2s_dma_tx = &msp0_dma_tx,
107};
108
109static struct stedma40_chan_cfg msp1_dma_rx = {
110 .high_priority = true,
111 .dir = STEDMA40_PERIPH_TO_MEM,
112
113 .src_dev_type = DB8500_DMA_DEV30_MSP3_RX,
114 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
115
116 .src_info.psize = STEDMA40_PSIZE_LOG_4,
117 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
118
119 /* data_width is set during configuration */
120};
121
122static struct stedma40_chan_cfg msp1_dma_tx = {
123 .high_priority = true,
124 .dir = STEDMA40_MEM_TO_PERIPH,
125
126 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
127 .dst_dev_type = DB8500_DMA_DEV30_MSP1_TX,
128
129 .src_info.psize = STEDMA40_PSIZE_LOG_4,
130 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
131
132 /* data_width is set during configuration */
133};
134
135static struct msp_i2s_platform_data msp1_platform_data = {
136 .id = MSP_I2S_1,
137 .msp_i2s_dma_rx = NULL,
138 .msp_i2s_dma_tx = &msp1_dma_tx,
139 .msp_i2s_init = msp13_i2s_init,
140 .msp_i2s_exit = msp13_i2s_exit,
141};
142
143static struct stedma40_chan_cfg msp2_dma_rx = {
144 .high_priority = true,
145 .dir = STEDMA40_PERIPH_TO_MEM,
146
147 .src_dev_type = DB8500_DMA_DEV14_MSP2_RX,
148 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
149
150 /* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */
151 .src_info.psize = STEDMA40_PSIZE_LOG_1,
152 .dst_info.psize = STEDMA40_PSIZE_LOG_1,
153
154 /* data_width is set during configuration */
155};
156
157static struct stedma40_chan_cfg msp2_dma_tx = {
158 .high_priority = true,
159 .dir = STEDMA40_MEM_TO_PERIPH,
160
161 .src_dev_type = STEDMA40_DEV_DST_MEMORY,
162 .dst_dev_type = DB8500_DMA_DEV14_MSP2_TX,
163
164 .src_info.psize = STEDMA40_PSIZE_LOG_4,
165 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
166
167 .use_fixed_channel = true,
168 .phy_channel = 1,
169
170 /* data_width is set during configuration */
171};
172
Linus Walleij09486cb2012-05-07 10:29:38 +0200173static struct platform_device *db8500_add_msp_i2s(struct device *parent,
174 int id,
Ola Liljac0af14d2012-04-20 11:32:59 +0200175 resource_size_t base, int irq,
176 struct msp_i2s_platform_data *pdata)
177{
178 struct platform_device *pdev;
179 struct resource res[] = {
180 DEFINE_RES_MEM(base, SZ_4K),
181 DEFINE_RES_IRQ(irq),
182 };
183
184 pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n",
185 id, irq);
186 pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id,
187 res, ARRAY_SIZE(res),
188 pdata, sizeof(*pdata));
189 if (!pdev) {
190 pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n",
191 id);
Linus Walleij09486cb2012-05-07 10:29:38 +0200192 return NULL;
Ola Liljac0af14d2012-04-20 11:32:59 +0200193 }
194
Linus Walleij09486cb2012-05-07 10:29:38 +0200195 return pdev;
Ola Liljac0af14d2012-04-20 11:32:59 +0200196}
197
198/* Platform device for ASoC U8500 machine */
199static struct platform_device snd_soc_u8500 = {
200 .name = "snd-soc-u8500",
201 .id = 0,
202 .dev = {
203 .platform_data = NULL,
204 },
205};
206
207/* Platform device for Ux500-PCM */
208static struct platform_device ux500_pcm = {
209 .name = "ux500-pcm",
210 .id = 0,
211 .dev = {
212 .platform_data = NULL,
213 },
214};
215
216static struct msp_i2s_platform_data msp2_platform_data = {
217 .id = MSP_I2S_2,
218 .msp_i2s_dma_rx = &msp2_dma_rx,
219 .msp_i2s_dma_tx = &msp2_dma_tx,
220};
221
222static struct msp_i2s_platform_data msp3_platform_data = {
223 .id = MSP_I2S_3,
224 .msp_i2s_dma_rx = &msp1_dma_rx,
225 .msp_i2s_dma_tx = NULL,
226 .msp_i2s_init = msp13_i2s_init,
227 .msp_i2s_exit = msp13_i2s_exit,
228};
229
230int mop500_msp_init(struct device *parent)
231{
Ola Liljac0af14d2012-04-20 11:32:59 +0200232 pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);
233 platform_device_register(&snd_soc_u8500);
234
235 pr_info("Initialize MSP I2S-devices.\n");
Linus Walleij09486cb2012-05-07 10:29:38 +0200236 db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
237 &msp0_platform_data);
238 db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,
239 &msp1_platform_data);
240 db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,
241 &msp2_platform_data);
242 db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
243 &msp3_platform_data);
Ola Liljac0af14d2012-04-20 11:32:59 +0200244
245 pr_info("%s: Register platform-device 'ux500-pcm'\n", __func__);
246 platform_device_register(&ux500_pcm);
247
Linus Walleij09486cb2012-05-07 10:29:38 +0200248 return 0;
Ola Liljac0af14d2012-04-20 11:32:59 +0200249}