Komal Shah | d395e6a | 2008-09-07 23:41:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * mach-davinci/devices.c |
| 3 | * |
| 4 | * DaVinci platform device setup/initialization |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | |
Komal Shah | d395e6a | 2008-09-07 23:41:28 -0700 | [diff] [blame] | 12 | #include <linux/init.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/dma-mapping.h> |
| 15 | #include <linux/io.h> |
| 16 | |
Komal Shah | d395e6a | 2008-09-07 23:41:28 -0700 | [diff] [blame] | 17 | #include <mach/hardware.h> |
| 18 | #include <mach/i2c.h> |
Russell King | 80b02c1 | 2009-01-08 10:01:47 +0000 | [diff] [blame] | 19 | #include <mach/irqs.h> |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame] | 20 | #include <mach/cputype.h> |
| 21 | #include <mach/mux.h> |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 22 | #include <mach/edma.h> |
| 23 | #include <mach/mmc.h> |
Mark A. Greer | f64691b | 2009-04-15 12:40:11 -0700 | [diff] [blame] | 24 | #include <mach/time.h> |
Komal Shah | d395e6a | 2008-09-07 23:41:28 -0700 | [diff] [blame] | 25 | |
Kevin Hilman | 28552c2 | 2010-02-25 15:36:38 -0800 | [diff] [blame] | 26 | #include "clock.h" |
| 27 | |
Kevin Hilman | f5c122d | 2009-04-14 07:04:16 -0500 | [diff] [blame] | 28 | #define DAVINCI_I2C_BASE 0x01C21000 |
Sergei Shtylyov | 7a9978a | 2010-04-21 18:11:33 +0400 | [diff] [blame] | 29 | #define DAVINCI_ATA_BASE 0x01C66000 |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 30 | #define DAVINCI_MMCSD0_BASE 0x01E10000 |
| 31 | #define DM355_MMCSD0_BASE 0x01E11000 |
| 32 | #define DM355_MMCSD1_BASE 0x01E00000 |
Sandeep Paulraj | 19ff3bf | 2009-06-20 13:58:32 -0400 | [diff] [blame] | 33 | #define DM365_MMCSD0_BASE 0x01D11000 |
| 34 | #define DM365_MMCSD1_BASE 0x01D00000 |
Kevin Hilman | f5c122d | 2009-04-14 07:04:16 -0500 | [diff] [blame] | 35 | |
Komal Shah | d395e6a | 2008-09-07 23:41:28 -0700 | [diff] [blame] | 36 | static struct resource i2c_resources[] = { |
| 37 | { |
| 38 | .start = DAVINCI_I2C_BASE, |
| 39 | .end = DAVINCI_I2C_BASE + 0x40, |
| 40 | .flags = IORESOURCE_MEM, |
| 41 | }, |
| 42 | { |
| 43 | .start = IRQ_I2C, |
| 44 | .flags = IORESOURCE_IRQ, |
| 45 | }, |
| 46 | }; |
| 47 | |
| 48 | static struct platform_device davinci_i2c_device = { |
| 49 | .name = "i2c_davinci", |
| 50 | .id = 1, |
| 51 | .num_resources = ARRAY_SIZE(i2c_resources), |
| 52 | .resource = i2c_resources, |
| 53 | }; |
| 54 | |
| 55 | void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata) |
| 56 | { |
Kevin Hilman | 5526b3f | 2009-04-14 09:50:37 -0500 | [diff] [blame] | 57 | if (cpu_is_davinci_dm644x()) |
| 58 | davinci_cfg_reg(DM644X_I2C); |
| 59 | |
Komal Shah | d395e6a | 2008-09-07 23:41:28 -0700 | [diff] [blame] | 60 | davinci_i2c_device.dev.platform_data = pdata; |
| 61 | (void) platform_device_register(&davinci_i2c_device); |
| 62 | } |
| 63 | |
Sergei Shtylyov | 7a9978a | 2010-04-21 18:11:33 +0400 | [diff] [blame] | 64 | static struct resource ide_resources[] = { |
| 65 | { |
| 66 | .start = DAVINCI_ATA_BASE, |
| 67 | .end = DAVINCI_ATA_BASE + 0x7ff, |
| 68 | .flags = IORESOURCE_MEM, |
| 69 | }, |
| 70 | { |
| 71 | .start = IRQ_IDE, |
| 72 | .end = IRQ_IDE, |
| 73 | .flags = IORESOURCE_IRQ, |
| 74 | }, |
| 75 | }; |
| 76 | |
| 77 | static u64 ide_dma_mask = DMA_BIT_MASK(32); |
| 78 | |
| 79 | static struct platform_device ide_device = { |
| 80 | .name = "palm_bk3710", |
| 81 | .id = -1, |
| 82 | .resource = ide_resources, |
| 83 | .num_resources = ARRAY_SIZE(ide_resources), |
| 84 | .dev = { |
| 85 | .dma_mask = &ide_dma_mask, |
| 86 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 87 | }, |
| 88 | }; |
| 89 | |
| 90 | void __init davinci_init_ide(void) |
| 91 | { |
| 92 | if (cpu_is_davinci_dm644x()) { |
| 93 | davinci_cfg_reg(DM644X_HPIEN_DISABLE); |
| 94 | davinci_cfg_reg(DM644X_ATAEN); |
| 95 | davinci_cfg_reg(DM644X_HDIREN); |
| 96 | } else if (cpu_is_davinci_dm646x()) { |
| 97 | /* IRQ_DM646X_IDE is the same as IRQ_IDE */ |
| 98 | davinci_cfg_reg(DM646X_ATAEN); |
| 99 | } else { |
| 100 | WARN_ON(1); |
| 101 | return; |
| 102 | } |
| 103 | |
| 104 | platform_device_register(&ide_device); |
| 105 | } |
| 106 | |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 107 | #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) |
| 108 | |
Kevin Hilman | b0958ae | 2009-05-29 18:54:14 +0100 | [diff] [blame] | 109 | static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32); |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 110 | |
| 111 | static struct resource mmcsd0_resources[] = { |
| 112 | { |
| 113 | /* different on dm355 */ |
| 114 | .start = DAVINCI_MMCSD0_BASE, |
| 115 | .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1, |
| 116 | .flags = IORESOURCE_MEM, |
| 117 | }, |
| 118 | /* IRQs: MMC/SD, then SDIO */ |
| 119 | { |
| 120 | .start = IRQ_MMCINT, |
| 121 | .flags = IORESOURCE_IRQ, |
| 122 | }, { |
| 123 | /* different on dm355 */ |
| 124 | .start = IRQ_SDIOINT, |
| 125 | .flags = IORESOURCE_IRQ, |
| 126 | }, |
| 127 | /* DMA channels: RX, then TX */ |
| 128 | { |
Sudhakar Rajashekhara | 60902a2 | 2009-05-21 07:41:35 -0400 | [diff] [blame] | 129 | .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT), |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 130 | .flags = IORESOURCE_DMA, |
| 131 | }, { |
Sudhakar Rajashekhara | 60902a2 | 2009-05-21 07:41:35 -0400 | [diff] [blame] | 132 | .start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT), |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 133 | .flags = IORESOURCE_DMA, |
| 134 | }, |
| 135 | }; |
| 136 | |
| 137 | static struct platform_device davinci_mmcsd0_device = { |
| 138 | .name = "davinci_mmc", |
| 139 | .id = 0, |
| 140 | .dev = { |
| 141 | .dma_mask = &mmcsd0_dma_mask, |
Kevin Hilman | b0958ae | 2009-05-29 18:54:14 +0100 | [diff] [blame] | 142 | .coherent_dma_mask = DMA_BIT_MASK(32), |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 143 | }, |
| 144 | .num_resources = ARRAY_SIZE(mmcsd0_resources), |
| 145 | .resource = mmcsd0_resources, |
| 146 | }; |
| 147 | |
Kevin Hilman | b0958ae | 2009-05-29 18:54:14 +0100 | [diff] [blame] | 148 | static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32); |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 149 | |
| 150 | static struct resource mmcsd1_resources[] = { |
| 151 | { |
| 152 | .start = DM355_MMCSD1_BASE, |
| 153 | .end = DM355_MMCSD1_BASE + SZ_4K - 1, |
| 154 | .flags = IORESOURCE_MEM, |
| 155 | }, |
| 156 | /* IRQs: MMC/SD, then SDIO */ |
| 157 | { |
| 158 | .start = IRQ_DM355_MMCINT1, |
| 159 | .flags = IORESOURCE_IRQ, |
| 160 | }, { |
| 161 | .start = IRQ_DM355_SDIOINT1, |
| 162 | .flags = IORESOURCE_IRQ, |
| 163 | }, |
| 164 | /* DMA channels: RX, then TX */ |
| 165 | { |
Sudhakar Rajashekhara | 60902a2 | 2009-05-21 07:41:35 -0400 | [diff] [blame] | 166 | .start = EDMA_CTLR_CHAN(0, 30), /* rx */ |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 167 | .flags = IORESOURCE_DMA, |
| 168 | }, { |
Sudhakar Rajashekhara | 60902a2 | 2009-05-21 07:41:35 -0400 | [diff] [blame] | 169 | .start = EDMA_CTLR_CHAN(0, 31), /* tx */ |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 170 | .flags = IORESOURCE_DMA, |
| 171 | }, |
| 172 | }; |
| 173 | |
| 174 | static struct platform_device davinci_mmcsd1_device = { |
| 175 | .name = "davinci_mmc", |
| 176 | .id = 1, |
| 177 | .dev = { |
| 178 | .dma_mask = &mmcsd1_dma_mask, |
Kevin Hilman | b0958ae | 2009-05-29 18:54:14 +0100 | [diff] [blame] | 179 | .coherent_dma_mask = DMA_BIT_MASK(32), |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 180 | }, |
| 181 | .num_resources = ARRAY_SIZE(mmcsd1_resources), |
| 182 | .resource = mmcsd1_resources, |
| 183 | }; |
| 184 | |
| 185 | |
| 186 | void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) |
| 187 | { |
| 188 | struct platform_device *pdev = NULL; |
| 189 | |
| 190 | if (WARN_ON(cpu_is_davinci_dm646x())) |
| 191 | return; |
| 192 | |
| 193 | /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too; |
| 194 | * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused. |
| 195 | * |
| 196 | * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are |
| 197 | * not handled right here ... |
| 198 | */ |
| 199 | switch (module) { |
| 200 | case 1: |
Sandeep Paulraj | 19ff3bf | 2009-06-20 13:58:32 -0400 | [diff] [blame] | 201 | if (cpu_is_davinci_dm355()) { |
| 202 | /* REVISIT we may not need all these pins if e.g. this |
| 203 | * is a hard-wired SDIO device... |
| 204 | */ |
| 205 | davinci_cfg_reg(DM355_SD1_CMD); |
| 206 | davinci_cfg_reg(DM355_SD1_CLK); |
| 207 | davinci_cfg_reg(DM355_SD1_DATA0); |
| 208 | davinci_cfg_reg(DM355_SD1_DATA1); |
| 209 | davinci_cfg_reg(DM355_SD1_DATA2); |
| 210 | davinci_cfg_reg(DM355_SD1_DATA3); |
| 211 | } else if (cpu_is_davinci_dm365()) { |
| 212 | void __iomem *pupdctl1 = |
| 213 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c); |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 214 | |
Sandeep Paulraj | 19ff3bf | 2009-06-20 13:58:32 -0400 | [diff] [blame] | 215 | /* Configure pull down control */ |
Sekhar Nori | 0a477f6 | 2010-07-14 17:09:45 +0530 | [diff] [blame^] | 216 | __raw_writel((__raw_readl(pupdctl1) & ~0xfc0), |
Sandeep Paulraj | 19ff3bf | 2009-06-20 13:58:32 -0400 | [diff] [blame] | 217 | pupdctl1); |
| 218 | |
| 219 | mmcsd1_resources[0].start = DM365_MMCSD1_BASE; |
| 220 | mmcsd1_resources[0].end = DM365_MMCSD1_BASE + |
| 221 | SZ_4K - 1; |
Phaneendra Kumar | eb5ba37 | 2009-08-27 17:06:56 -0400 | [diff] [blame] | 222 | mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1; |
Sandeep Paulraj | 19ff3bf | 2009-06-20 13:58:32 -0400 | [diff] [blame] | 223 | } else |
| 224 | break; |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 225 | |
| 226 | pdev = &davinci_mmcsd1_device; |
| 227 | break; |
| 228 | case 0: |
| 229 | if (cpu_is_davinci_dm355()) { |
| 230 | mmcsd0_resources[0].start = DM355_MMCSD0_BASE; |
| 231 | mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1; |
| 232 | mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0; |
| 233 | |
| 234 | /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */ |
| 235 | davinci_cfg_reg(DM355_MMCSD0); |
| 236 | |
| 237 | /* enable RX EDMA */ |
| 238 | davinci_cfg_reg(DM355_EVT26_MMC0_RX); |
Sandeep Paulraj | 19ff3bf | 2009-06-20 13:58:32 -0400 | [diff] [blame] | 239 | } else if (cpu_is_davinci_dm365()) { |
| 240 | mmcsd0_resources[0].start = DM365_MMCSD0_BASE; |
| 241 | mmcsd0_resources[0].end = DM365_MMCSD0_BASE + |
| 242 | SZ_4K - 1; |
| 243 | mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; |
| 244 | } else if (cpu_is_davinci_dm644x()) { |
Kevin Hilman | 2dbf56ae | 2009-05-11 15:55:03 -0700 | [diff] [blame] | 245 | /* REVISIT: should this be in board-init code? */ |
| 246 | void __iomem *base = |
| 247 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); |
| 248 | |
| 249 | /* Power-on 3.3V IO cells */ |
| 250 | __raw_writel(0, base + DM64XX_VDD3P3V_PWDN); |
| 251 | /*Set up the pull regiter for MMC */ |
| 252 | davinci_cfg_reg(DM644X_MSTK); |
| 253 | } |
| 254 | |
| 255 | pdev = &davinci_mmcsd0_device; |
| 256 | break; |
| 257 | } |
| 258 | |
| 259 | if (WARN_ON(!pdev)) |
| 260 | return; |
| 261 | |
| 262 | pdev->dev.platform_data = config; |
| 263 | platform_device_register(pdev); |
| 264 | } |
| 265 | |
| 266 | #else |
| 267 | |
| 268 | void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) |
| 269 | { |
| 270 | } |
| 271 | |
| 272 | #endif |
| 273 | |
Kevin Hilman | fb63138 | 2009-04-29 16:23:59 -0700 | [diff] [blame] | 274 | /*-------------------------------------------------------------------------*/ |
| 275 | |
| 276 | static struct resource wdt_resources[] = { |
| 277 | { |
Kevin Hilman | 5fcd294 | 2009-06-03 12:24:50 -0700 | [diff] [blame] | 278 | .start = DAVINCI_WDOG_BASE, |
| 279 | .end = DAVINCI_WDOG_BASE + SZ_1K - 1, |
Kevin Hilman | fb63138 | 2009-04-29 16:23:59 -0700 | [diff] [blame] | 280 | .flags = IORESOURCE_MEM, |
| 281 | }, |
| 282 | }; |
| 283 | |
| 284 | struct platform_device davinci_wdt_device = { |
| 285 | .name = "watchdog", |
| 286 | .id = -1, |
| 287 | .num_resources = ARRAY_SIZE(wdt_resources), |
| 288 | .resource = wdt_resources, |
| 289 | }; |
| 290 | |
| 291 | static void davinci_init_wdt(void) |
| 292 | { |
| 293 | platform_device_register(&davinci_wdt_device); |
| 294 | } |
| 295 | |
| 296 | /*-------------------------------------------------------------------------*/ |
| 297 | |
Mark A. Greer | f64691b | 2009-04-15 12:40:11 -0700 | [diff] [blame] | 298 | struct davinci_timer_instance davinci_timer_instance[2] = { |
| 299 | { |
Cyril Chemparathy | 1bcd38a | 2010-05-07 17:06:35 -0400 | [diff] [blame] | 300 | .base = DAVINCI_TIMER0_BASE, |
Mark A. Greer | f64691b | 2009-04-15 12:40:11 -0700 | [diff] [blame] | 301 | .bottom_irq = IRQ_TINT0_TINT12, |
| 302 | .top_irq = IRQ_TINT0_TINT34, |
| 303 | }, |
| 304 | { |
Cyril Chemparathy | 1bcd38a | 2010-05-07 17:06:35 -0400 | [diff] [blame] | 305 | .base = DAVINCI_TIMER1_BASE, |
Mark A. Greer | f64691b | 2009-04-15 12:40:11 -0700 | [diff] [blame] | 306 | .bottom_irq = IRQ_TINT1_TINT12, |
| 307 | .top_irq = IRQ_TINT1_TINT34, |
| 308 | }, |
| 309 | }; |
| 310 | |
| 311 | /*-------------------------------------------------------------------------*/ |
| 312 | |
Kevin Hilman | fb63138 | 2009-04-29 16:23:59 -0700 | [diff] [blame] | 313 | static int __init davinci_init_devices(void) |
| 314 | { |
| 315 | /* please keep these calls, and their implementations above, |
| 316 | * in alphabetical order so they're easier to sort through. |
| 317 | */ |
| 318 | davinci_init_wdt(); |
| 319 | |
| 320 | return 0; |
| 321 | } |
| 322 | arch_initcall(davinci_init_devices); |
| 323 | |