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Nobuhiro Iwamatsu4cec1a32008-06-06 17:04:56 +09001/*
2 * linux/arch/sh/boards/renesas/sh7763rdp/setup.c
3 *
4 * Renesas Solutions sh7763rdp board
5 *
6 * Copyright (C) 2008 Renesas Solutions Corp.
7 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/interrupt.h>
16#include <linux/input.h>
17#include <linux/mtd/physmap.h>
Nobuhiro Iwamatsu0a766a62008-08-08 14:29:58 +090018#include <linux/io.h>
Nobuhiro Iwamatsu4cec1a32008-06-06 17:04:56 +090019#include <asm/sh7763rdp.h>
Nobuhiro Iwamatsu0a766a62008-08-08 14:29:58 +090020#include <asm/sh_eth.h>
Nobuhiro Iwamatsu4cec1a32008-06-06 17:04:56 +090021
22/* NOR Flash */
23static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
24 {
25 .name = "U-Boot",
26 .offset = 0,
27 .size = (2 * 128 * 1024),
28 .mask_flags = MTD_WRITEABLE, /* Read-only */
29 }, {
30 .name = "Linux-Kernel",
31 .offset = MTDPART_OFS_APPEND,
32 .size = (20 * 128 * 1024),
33 }, {
34 .name = "Root Filesystem",
35 .offset = MTDPART_OFS_APPEND,
36 .size = MTDPART_SIZ_FULL,
37 },
38};
39
40static struct physmap_flash_data sh7763rdp_nor_flash_data = {
41 .width = 2,
42 .parts = sh7763rdp_nor_flash_partitions,
43 .nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
44};
45
46static struct resource sh7763rdp_nor_flash_resources[] = {
47 [0] = {
48 .name = "NOR Flash",
49 .start = 0,
50 .end = (64 * 1024 * 1024),
51 .flags = IORESOURCE_MEM,
52 },
53};
54
55static struct platform_device sh7763rdp_nor_flash_device = {
56 .name = "physmap-flash",
57 .resource = sh7763rdp_nor_flash_resources,
58 .num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
59 .dev = {
60 .platform_data = &sh7763rdp_nor_flash_data,
61 },
62};
63
Nobuhiro Iwamatsu0a766a62008-08-08 14:29:58 +090064/* SH-Ether */
65static struct resource sh_eth_resources[] = {
66 {
67 .start = 0xFEE00800, /* use eth1 */
68 .end = 0xFEE00F7C - 1,
69 .flags = IORESOURCE_MEM,
70 }, {
71 .start = 58, /* irq number */
72 .end = 58,
73 .flags = IORESOURCE_IRQ,
74 },
75};
76
77static struct sh_eth_plat_data sh7763_eth_pdata = {
78 .phy = 1,
79 .edmac_endian = EDMAC_LITTLE_ENDIAN,
80};
81
82static struct platform_device sh7763rdp_eth_device = {
83 .name = "sh-eth",
84 .resource = sh_eth_resources,
85 .num_resources = ARRAY_SIZE(sh_eth_resources),
86 .dev = {
87 .platform_data = &sh7763_eth_pdata,
88 },
89};
90
Nobuhiro Iwamatsu4cec1a32008-06-06 17:04:56 +090091static struct platform_device *sh7763rdp_devices[] __initdata = {
92 &sh7763rdp_nor_flash_device,
Nobuhiro Iwamatsu0a766a62008-08-08 14:29:58 +090093 &sh7763rdp_eth_device,
Nobuhiro Iwamatsu4cec1a32008-06-06 17:04:56 +090094};
95
96static int __init sh7763rdp_devices_setup(void)
97{
98 return platform_add_devices(sh7763rdp_devices,
99 ARRAY_SIZE(sh7763rdp_devices));
100}
Nobuhiro Iwamatsu0a766a62008-08-08 14:29:58 +0900101
102device_initcall(sh7763rdp_devices_setup);
Nobuhiro Iwamatsu4cec1a32008-06-06 17:04:56 +0900103
104static void __init sh7763rdp_setup(char **cmdline_p)
105{
106 /* Board version check */
107 if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
108 printk(KERN_INFO "RTE Standard Configuration\n");
109 else
110 printk(KERN_INFO "RTA Standard Configuration\n");
111
112 /* USB pin select bits (clear bit 5-2 to 0) */
113 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
114 /* USBH setup port I controls to other (clear bits 4-9 to 0) */
115 ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR);
116
117 /* Select USB Host controller */
118 ctrl_outw(0x00, USB_USBHSC);
119
120 /* For LCD */
121 /* set PTJ7-1, bits 15-2 of PJCR to 0 */
122 ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR);
123 /* set PTI5, bits 11-10 of PICR to 0 */
124 ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR);
125 ctrl_outw(0, PORT_PKCR);
126 ctrl_outw(0, PORT_PLCR);
127 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
128 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
129 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
130 ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
131
132 /* For HAC */
133 /* bit3-0 0100:HAC & SSI1 enable */
134 ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
135 /* bit14 1:SSI_HAC_CLK enable */
136 ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
137
138 /* SH-Ether */
139 ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
140 ctrl_outw(0x0, PORT_PFCR);
141 ctrl_outw(0x0, PORT_PFCR);
142 ctrl_outw(0x0, PORT_PFCR);
143
144 /* MMC */
145 /*selects SCIF and MMC other functions */
146 ctrl_outw(0x0001, PORT_PSEL0);
147 /* MMC clock operates */
148 ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1);
149 ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR);
150 ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
151}
152
153static struct sh_machine_vector mv_sh7763rdp __initmv = {
154 .mv_name = "sh7763drp",
155 .mv_setup = sh7763rdp_setup,
156 .mv_nr_irqs = 112,
157 .mv_init_irq = init_sh7763rdp_IRQ,
158};