blob: 0c3b089b280a9d8cf114381fdd80e0b0249599b7 [file] [log] [blame]
Dan Williams1f7df6f2015-06-09 20:13:14 -04001/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
Dan Williamseaf96152015-05-01 13:11:27 -040013#include <linux/scatterlist.h>
Ross Zwisler047fc8a2015-06-25 04:21:02 -040014#include <linux/highmem.h>
Dan Williamseaf96152015-05-01 13:11:27 -040015#include <linux/sched.h>
Dan Williams1f7df6f2015-06-09 20:13:14 -040016#include <linux/slab.h>
Dan Williams0c27af62016-05-27 09:23:01 -070017#include <linux/hash.h>
Dan Williamseaf96152015-05-01 13:11:27 -040018#include <linux/sort.h>
Dan Williams1f7df6f2015-06-09 20:13:14 -040019#include <linux/io.h>
Dan Williamsbf9bccc2015-06-17 17:14:46 -040020#include <linux/nd.h>
Dan Williams1f7df6f2015-06-09 20:13:14 -040021#include "nd-core.h"
22#include "nd.h"
23
Dan Williamsf284a4f2016-07-07 19:44:50 -070024/*
25 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
26 * irrelevant.
27 */
28#include <linux/io-64-nonatomic-hi-lo.h>
29
Dan Williams1f7df6f2015-06-09 20:13:14 -040030static DEFINE_IDA(region_ida);
Dan Williams0c27af62016-05-27 09:23:01 -070031static DEFINE_PER_CPU(int, flush_idx);
Dan Williams1f7df6f2015-06-09 20:13:14 -040032
Dan Williamse5ae3b22016-06-07 17:00:04 -070033static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
34 struct nd_region_data *ndrd)
35{
36 int i, j;
37
38 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
39 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
Dan Williams595c7302016-09-23 17:53:52 -070040 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
Dan Williamse5ae3b22016-06-07 17:00:04 -070041 struct resource *res = &nvdimm->flush_wpq[i];
42 unsigned long pfn = PHYS_PFN(res->start);
43 void __iomem *flush_page;
44
45 /* check if flush hints share a page */
46 for (j = 0; j < i; j++) {
47 struct resource *res_j = &nvdimm->flush_wpq[j];
48 unsigned long pfn_j = PHYS_PFN(res_j->start);
49
50 if (pfn == pfn_j)
51 break;
52 }
53
54 if (j < i)
55 flush_page = (void __iomem *) ((unsigned long)
Dan Williams595c7302016-09-23 17:53:52 -070056 ndrd_get_flush_wpq(ndrd, dimm, j)
57 & PAGE_MASK);
Dan Williamse5ae3b22016-06-07 17:00:04 -070058 else
59 flush_page = devm_nvdimm_ioremap(dev,
Oliver O'Halloran480b6832016-09-19 20:19:00 +100060 PFN_PHYS(pfn), PAGE_SIZE);
Dan Williamse5ae3b22016-06-07 17:00:04 -070061 if (!flush_page)
62 return -ENXIO;
Dan Williams595c7302016-09-23 17:53:52 -070063 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
64 + (res->start & ~PAGE_MASK));
Dan Williamse5ae3b22016-06-07 17:00:04 -070065 }
66
67 return 0;
68}
69
70int nd_region_activate(struct nd_region *nd_region)
71{
Dave Jiangdb580282016-09-26 11:06:50 -070072 int i, j, num_flush = 0;
Dan Williamse5ae3b22016-06-07 17:00:04 -070073 struct nd_region_data *ndrd;
74 struct device *dev = &nd_region->dev;
75 size_t flush_data_size = sizeof(void *);
76
77 nvdimm_bus_lock(&nd_region->dev);
78 for (i = 0; i < nd_region->ndr_mappings; i++) {
79 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
80 struct nvdimm *nvdimm = nd_mapping->nvdimm;
81
82 /* at least one null hint slot per-dimm for the "no-hint" case */
83 flush_data_size += sizeof(void *);
Dan Williams0c27af62016-05-27 09:23:01 -070084 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
Dan Williamse5ae3b22016-06-07 17:00:04 -070085 if (!nvdimm->num_flush)
86 continue;
87 flush_data_size += nvdimm->num_flush * sizeof(void *);
88 }
89 nvdimm_bus_unlock(&nd_region->dev);
90
91 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
92 if (!ndrd)
93 return -ENOMEM;
94 dev_set_drvdata(dev, ndrd);
95
Dan Williams595c7302016-09-23 17:53:52 -070096 if (!num_flush)
97 return 0;
98
99 ndrd->hints_shift = ilog2(num_flush);
Dan Williamse5ae3b22016-06-07 17:00:04 -0700100 for (i = 0; i < nd_region->ndr_mappings; i++) {
101 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
102 struct nvdimm *nvdimm = nd_mapping->nvdimm;
103 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
104
105 if (rc)
106 return rc;
107 }
108
Dave Jiangdb580282016-09-26 11:06:50 -0700109 /*
110 * Clear out entries that are duplicates. This should prevent the
111 * extra flushings.
112 */
113 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
114 /* ignore if NULL already */
115 if (!ndrd_get_flush_wpq(ndrd, i, 0))
116 continue;
117
118 for (j = i + 1; j < nd_region->ndr_mappings; j++)
119 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
120 ndrd_get_flush_wpq(ndrd, j, 0))
121 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
122 }
123
Dan Williamse5ae3b22016-06-07 17:00:04 -0700124 return 0;
125}
126
Dan Williams1f7df6f2015-06-09 20:13:14 -0400127static void nd_region_release(struct device *dev)
128{
129 struct nd_region *nd_region = to_nd_region(dev);
130 u16 i;
131
132 for (i = 0; i < nd_region->ndr_mappings; i++) {
133 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
134 struct nvdimm *nvdimm = nd_mapping->nvdimm;
135
136 put_device(&nvdimm->dev);
137 }
Vishal Verma5212e112015-06-25 04:20:32 -0400138 free_percpu(nd_region->lane);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400139 ida_simple_remove(&region_ida, nd_region->id);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400140 if (is_nd_blk(dev))
141 kfree(to_nd_blk_region(dev));
142 else
143 kfree(nd_region);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400144}
145
146static struct device_type nd_blk_device_type = {
147 .name = "nd_blk",
148 .release = nd_region_release,
149};
150
151static struct device_type nd_pmem_device_type = {
152 .name = "nd_pmem",
153 .release = nd_region_release,
154};
155
156static struct device_type nd_volatile_device_type = {
157 .name = "nd_volatile",
158 .release = nd_region_release,
159};
160
Dan Williams3d880022015-05-31 15:02:11 -0400161bool is_nd_pmem(struct device *dev)
Dan Williams1f7df6f2015-06-09 20:13:14 -0400162{
163 return dev ? dev->type == &nd_pmem_device_type : false;
164}
165
Dan Williams3d880022015-05-31 15:02:11 -0400166bool is_nd_blk(struct device *dev)
167{
168 return dev ? dev->type == &nd_blk_device_type : false;
169}
170
Dan Williamsc9e582a2017-05-29 23:12:19 -0700171bool is_nd_volatile(struct device *dev)
172{
173 return dev ? dev->type == &nd_volatile_device_type : false;
174}
175
Dan Williams1f7df6f2015-06-09 20:13:14 -0400176struct nd_region *to_nd_region(struct device *dev)
177{
178 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
179
180 WARN_ON(dev->type->release != nd_region_release);
181 return nd_region;
182}
183EXPORT_SYMBOL_GPL(to_nd_region);
184
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400185struct nd_blk_region *to_nd_blk_region(struct device *dev)
186{
187 struct nd_region *nd_region = to_nd_region(dev);
188
189 WARN_ON(!is_nd_blk(dev));
190 return container_of(nd_region, struct nd_blk_region, nd_region);
191}
192EXPORT_SYMBOL_GPL(to_nd_blk_region);
193
194void *nd_region_provider_data(struct nd_region *nd_region)
195{
196 return nd_region->provider_data;
197}
198EXPORT_SYMBOL_GPL(nd_region_provider_data);
199
200void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
201{
202 return ndbr->blk_provider_data;
203}
204EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
205
206void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
207{
208 ndbr->blk_provider_data = data;
209}
210EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
211
Dan Williams3d880022015-05-31 15:02:11 -0400212/**
213 * nd_region_to_nstype() - region to an integer namespace type
214 * @nd_region: region-device to interrogate
215 *
216 * This is the 'nstype' attribute of a region as well, an input to the
217 * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
218 * namespace devices with namespace drivers.
219 */
220int nd_region_to_nstype(struct nd_region *nd_region)
221{
Dan Williamsc9e582a2017-05-29 23:12:19 -0700222 if (is_memory(&nd_region->dev)) {
Dan Williams3d880022015-05-31 15:02:11 -0400223 u16 i, alias;
224
225 for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
226 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
227 struct nvdimm *nvdimm = nd_mapping->nvdimm;
228
Dan Williams8f078b32017-05-04 14:01:24 -0700229 if (test_bit(NDD_ALIASING, &nvdimm->flags))
Dan Williams3d880022015-05-31 15:02:11 -0400230 alias++;
231 }
232 if (alias)
233 return ND_DEVICE_NAMESPACE_PMEM;
234 else
235 return ND_DEVICE_NAMESPACE_IO;
236 } else if (is_nd_blk(&nd_region->dev)) {
237 return ND_DEVICE_NAMESPACE_BLK;
238 }
239
240 return 0;
241}
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400242EXPORT_SYMBOL(nd_region_to_nstype);
243
Dan Williams1f7df6f2015-06-09 20:13:14 -0400244static ssize_t size_show(struct device *dev,
245 struct device_attribute *attr, char *buf)
246{
247 struct nd_region *nd_region = to_nd_region(dev);
248 unsigned long long size = 0;
249
Dan Williamsc9e582a2017-05-29 23:12:19 -0700250 if (is_memory(dev)) {
Dan Williams1f7df6f2015-06-09 20:13:14 -0400251 size = nd_region->ndr_size;
252 } else if (nd_region->ndr_mappings == 1) {
253 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
254
255 size = nd_mapping->size;
256 }
257
258 return sprintf(buf, "%llu\n", size);
259}
260static DEVICE_ATTR_RO(size);
261
Dan Williamsab630892017-04-21 13:28:12 -0700262static ssize_t deep_flush_show(struct device *dev,
263 struct device_attribute *attr, char *buf)
264{
265 struct nd_region *nd_region = to_nd_region(dev);
266
267 /*
268 * NOTE: in the nvdimm_has_flush() error case this attribute is
269 * not visible.
270 */
271 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
272}
273
274static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
275 const char *buf, size_t len)
276{
277 bool flush;
278 int rc = strtobool(buf, &flush);
279 struct nd_region *nd_region = to_nd_region(dev);
280
281 if (rc)
282 return rc;
283 if (!flush)
284 return -EINVAL;
285 nvdimm_flush(nd_region);
286
287 return len;
288}
289static DEVICE_ATTR_RW(deep_flush);
290
Dan Williams1f7df6f2015-06-09 20:13:14 -0400291static ssize_t mappings_show(struct device *dev,
292 struct device_attribute *attr, char *buf)
293{
294 struct nd_region *nd_region = to_nd_region(dev);
295
296 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
297}
298static DEVICE_ATTR_RO(mappings);
299
Dan Williams3d880022015-05-31 15:02:11 -0400300static ssize_t nstype_show(struct device *dev,
301 struct device_attribute *attr, char *buf)
302{
303 struct nd_region *nd_region = to_nd_region(dev);
304
305 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
306}
307static DEVICE_ATTR_RO(nstype);
308
Dan Williamseaf96152015-05-01 13:11:27 -0400309static ssize_t set_cookie_show(struct device *dev,
310 struct device_attribute *attr, char *buf)
311{
312 struct nd_region *nd_region = to_nd_region(dev);
313 struct nd_interleave_set *nd_set = nd_region->nd_set;
314
Dan Williamsc9e582a2017-05-29 23:12:19 -0700315 if (is_memory(dev) && nd_set)
Dan Williamseaf96152015-05-01 13:11:27 -0400316 /* pass, should be precluded by region_visible */;
317 else
318 return -ENXIO;
319
320 return sprintf(buf, "%#llx\n", nd_set->cookie);
321}
322static DEVICE_ATTR_RO(set_cookie);
323
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400324resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
325{
326 resource_size_t blk_max_overlap = 0, available, overlap;
327 int i;
328
329 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
330
331 retry:
332 available = 0;
333 overlap = blk_max_overlap;
334 for (i = 0; i < nd_region->ndr_mappings; i++) {
335 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
336 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
337
338 /* if a dimm is disabled the available capacity is zero */
339 if (!ndd)
340 return 0;
341
Dan Williamsc9e582a2017-05-29 23:12:19 -0700342 if (is_memory(&nd_region->dev)) {
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400343 available += nd_pmem_available_dpa(nd_region,
344 nd_mapping, &overlap);
345 if (overlap > blk_max_overlap) {
346 blk_max_overlap = overlap;
347 goto retry;
348 }
Dan Williamsa1f3e4d2016-09-30 17:28:58 -0700349 } else if (is_nd_blk(&nd_region->dev))
350 available += nd_blk_available_dpa(nd_region);
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400351 }
352
353 return available;
354}
355
356static ssize_t available_size_show(struct device *dev,
357 struct device_attribute *attr, char *buf)
358{
359 struct nd_region *nd_region = to_nd_region(dev);
360 unsigned long long available = 0;
361
362 /*
363 * Flush in-flight updates and grab a snapshot of the available
364 * size. Of course, this value is potentially invalidated the
365 * memory nvdimm_bus_lock() is dropped, but that's userspace's
366 * problem to not race itself.
367 */
368 nvdimm_bus_lock(dev);
369 wait_nvdimm_bus_probe_idle(dev);
370 available = nd_region_available_dpa(nd_region);
371 nvdimm_bus_unlock(dev);
372
373 return sprintf(buf, "%llu\n", available);
374}
375static DEVICE_ATTR_RO(available_size);
376
Dan Williams3d880022015-05-31 15:02:11 -0400377static ssize_t init_namespaces_show(struct device *dev,
378 struct device_attribute *attr, char *buf)
379{
Dan Williamse5ae3b22016-06-07 17:00:04 -0700380 struct nd_region_data *ndrd = dev_get_drvdata(dev);
Dan Williams3d880022015-05-31 15:02:11 -0400381 ssize_t rc;
382
383 nvdimm_bus_lock(dev);
Dan Williamse5ae3b22016-06-07 17:00:04 -0700384 if (ndrd)
385 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
Dan Williams3d880022015-05-31 15:02:11 -0400386 else
387 rc = -ENXIO;
388 nvdimm_bus_unlock(dev);
389
390 return rc;
391}
392static DEVICE_ATTR_RO(init_namespaces);
393
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400394static ssize_t namespace_seed_show(struct device *dev,
395 struct device_attribute *attr, char *buf)
396{
397 struct nd_region *nd_region = to_nd_region(dev);
398 ssize_t rc;
399
400 nvdimm_bus_lock(dev);
401 if (nd_region->ns_seed)
402 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
403 else
404 rc = sprintf(buf, "\n");
405 nvdimm_bus_unlock(dev);
406 return rc;
407}
408static DEVICE_ATTR_RO(namespace_seed);
409
Dan Williams8c2f7e82015-06-25 04:20:04 -0400410static ssize_t btt_seed_show(struct device *dev,
411 struct device_attribute *attr, char *buf)
412{
413 struct nd_region *nd_region = to_nd_region(dev);
414 ssize_t rc;
415
416 nvdimm_bus_lock(dev);
417 if (nd_region->btt_seed)
418 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
419 else
420 rc = sprintf(buf, "\n");
421 nvdimm_bus_unlock(dev);
422
423 return rc;
424}
425static DEVICE_ATTR_RO(btt_seed);
426
Dan Williamse1455742015-07-30 17:57:47 -0400427static ssize_t pfn_seed_show(struct device *dev,
428 struct device_attribute *attr, char *buf)
429{
430 struct nd_region *nd_region = to_nd_region(dev);
431 ssize_t rc;
432
433 nvdimm_bus_lock(dev);
434 if (nd_region->pfn_seed)
435 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
436 else
437 rc = sprintf(buf, "\n");
438 nvdimm_bus_unlock(dev);
439
440 return rc;
441}
442static DEVICE_ATTR_RO(pfn_seed);
443
Dan Williamscd034122016-03-11 10:15:36 -0800444static ssize_t dax_seed_show(struct device *dev,
445 struct device_attribute *attr, char *buf)
446{
447 struct nd_region *nd_region = to_nd_region(dev);
448 ssize_t rc;
449
450 nvdimm_bus_lock(dev);
451 if (nd_region->dax_seed)
452 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
453 else
454 rc = sprintf(buf, "\n");
455 nvdimm_bus_unlock(dev);
456
457 return rc;
458}
459static DEVICE_ATTR_RO(dax_seed);
460
Dan Williams58138822015-06-23 20:08:34 -0400461static ssize_t read_only_show(struct device *dev,
462 struct device_attribute *attr, char *buf)
463{
464 struct nd_region *nd_region = to_nd_region(dev);
465
466 return sprintf(buf, "%d\n", nd_region->ro);
467}
468
469static ssize_t read_only_store(struct device *dev,
470 struct device_attribute *attr, const char *buf, size_t len)
471{
472 bool ro;
473 int rc = strtobool(buf, &ro);
474 struct nd_region *nd_region = to_nd_region(dev);
475
476 if (rc)
477 return rc;
478
479 nd_region->ro = ro;
480 return len;
481}
482static DEVICE_ATTR_RW(read_only);
483
Dan Williams23f49842017-04-29 15:24:03 -0700484static ssize_t region_badblocks_show(struct device *dev,
Dave Jiang6a6bef92017-04-07 15:33:20 -0700485 struct device_attribute *attr, char *buf)
486{
487 struct nd_region *nd_region = to_nd_region(dev);
488
489 return badblocks_show(&nd_region->bb, buf, 0);
490}
Dan Williams23f49842017-04-29 15:24:03 -0700491
492static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
Dave Jiang6a6bef92017-04-07 15:33:20 -0700493
Dave Jiang802f4be2017-04-07 15:33:25 -0700494static ssize_t resource_show(struct device *dev,
495 struct device_attribute *attr, char *buf)
496{
497 struct nd_region *nd_region = to_nd_region(dev);
498
499 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
500}
501static DEVICE_ATTR_RO(resource);
502
Dan Williams1f7df6f2015-06-09 20:13:14 -0400503static struct attribute *nd_region_attributes[] = {
504 &dev_attr_size.attr,
Dan Williams3d880022015-05-31 15:02:11 -0400505 &dev_attr_nstype.attr,
Dan Williams1f7df6f2015-06-09 20:13:14 -0400506 &dev_attr_mappings.attr,
Dan Williams8c2f7e82015-06-25 04:20:04 -0400507 &dev_attr_btt_seed.attr,
Dan Williamse1455742015-07-30 17:57:47 -0400508 &dev_attr_pfn_seed.attr,
Dan Williamscd034122016-03-11 10:15:36 -0800509 &dev_attr_dax_seed.attr,
Dan Williamsab630892017-04-21 13:28:12 -0700510 &dev_attr_deep_flush.attr,
Dan Williams58138822015-06-23 20:08:34 -0400511 &dev_attr_read_only.attr,
Dan Williamseaf96152015-05-01 13:11:27 -0400512 &dev_attr_set_cookie.attr,
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400513 &dev_attr_available_size.attr,
514 &dev_attr_namespace_seed.attr,
Dan Williams3d880022015-05-31 15:02:11 -0400515 &dev_attr_init_namespaces.attr,
Dan Williams23f49842017-04-29 15:24:03 -0700516 &dev_attr_badblocks.attr,
Dave Jiang802f4be2017-04-07 15:33:25 -0700517 &dev_attr_resource.attr,
Dan Williams1f7df6f2015-06-09 20:13:14 -0400518 NULL,
519};
520
Dan Williamseaf96152015-05-01 13:11:27 -0400521static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
522{
523 struct device *dev = container_of(kobj, typeof(*dev), kobj);
524 struct nd_region *nd_region = to_nd_region(dev);
525 struct nd_interleave_set *nd_set = nd_region->nd_set;
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400526 int type = nd_region_to_nstype(nd_region);
Dan Williamseaf96152015-05-01 13:11:27 -0400527
Dan Williamsc9e582a2017-05-29 23:12:19 -0700528 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
Dmitry Krivenok6bb691a2015-12-02 09:39:29 +0300529 return 0;
530
Dan Williamsc9e582a2017-05-29 23:12:19 -0700531 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
Dan Williamscd034122016-03-11 10:15:36 -0800532 return 0;
533
Dan Williams23f49842017-04-29 15:24:03 -0700534 if (!is_nd_pmem(dev) && a == &dev_attr_badblocks.attr)
Dave Jiang6a6bef92017-04-07 15:33:20 -0700535 return 0;
536
Dave Jiang802f4be2017-04-07 15:33:25 -0700537 if (!is_nd_pmem(dev) && a == &dev_attr_resource.attr)
538 return 0;
539
Dan Williamsab630892017-04-21 13:28:12 -0700540 if (a == &dev_attr_deep_flush.attr) {
541 int has_flush = nvdimm_has_flush(nd_region);
542
543 if (has_flush == 1)
544 return a->mode;
545 else if (has_flush == 0)
546 return 0444;
547 else
548 return 0;
549 }
550
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400551 if (a != &dev_attr_set_cookie.attr
552 && a != &dev_attr_available_size.attr)
Dan Williamseaf96152015-05-01 13:11:27 -0400553 return a->mode;
554
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400555 if ((type == ND_DEVICE_NAMESPACE_PMEM
556 || type == ND_DEVICE_NAMESPACE_BLK)
557 && a == &dev_attr_available_size.attr)
558 return a->mode;
Dan Williamsc9e582a2017-05-29 23:12:19 -0700559 else if (is_memory(dev) && nd_set)
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400560 return a->mode;
Dan Williamseaf96152015-05-01 13:11:27 -0400561
562 return 0;
563}
564
Dan Williams1f7df6f2015-06-09 20:13:14 -0400565struct attribute_group nd_region_attribute_group = {
566 .attrs = nd_region_attributes,
Dan Williamseaf96152015-05-01 13:11:27 -0400567 .is_visible = region_visible,
Dan Williams1f7df6f2015-06-09 20:13:14 -0400568};
569EXPORT_SYMBOL_GPL(nd_region_attribute_group);
570
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400571u64 nd_region_interleave_set_cookie(struct nd_region *nd_region)
572{
573 struct nd_interleave_set *nd_set = nd_region->nd_set;
574
575 if (nd_set)
576 return nd_set->cookie;
577 return 0;
578}
579
Dan Williams86ef58a2017-02-28 18:32:48 -0800580u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
581{
582 struct nd_interleave_set *nd_set = nd_region->nd_set;
583
584 if (nd_set)
585 return nd_set->altcookie;
586 return 0;
587}
588
Dan Williamsae8219f2016-09-19 16:04:21 -0700589void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
590{
591 struct nd_label_ent *label_ent, *e;
592
Dan Williams9cf8bd52016-12-15 20:04:31 -0800593 lockdep_assert_held(&nd_mapping->lock);
Dan Williamsae8219f2016-09-19 16:04:21 -0700594 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
595 list_del(&label_ent->list);
596 kfree(label_ent);
597 }
598}
599
Dan Williamseaf96152015-05-01 13:11:27 -0400600/*
601 * Upon successful probe/remove, take/release a reference on the
Dan Williams8c2f7e82015-06-25 04:20:04 -0400602 * associated interleave set (if present), and plant new btt + namespace
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400603 * seeds. Also, on the removal of a BLK region, notify the provider to
604 * disable the region.
Dan Williamseaf96152015-05-01 13:11:27 -0400605 */
606static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
607 struct device *dev, bool probe)
608{
Dan Williams8c2f7e82015-06-25 04:20:04 -0400609 struct nd_region *nd_region;
610
Dan Williamsc9e582a2017-05-29 23:12:19 -0700611 if (!probe && is_nd_region(dev)) {
Dan Williamseaf96152015-05-01 13:11:27 -0400612 int i;
613
Dan Williams8c2f7e82015-06-25 04:20:04 -0400614 nd_region = to_nd_region(dev);
Dan Williamseaf96152015-05-01 13:11:27 -0400615 for (i = 0; i < nd_region->ndr_mappings; i++) {
616 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400617 struct nvdimm_drvdata *ndd = nd_mapping->ndd;
Dan Williamseaf96152015-05-01 13:11:27 -0400618 struct nvdimm *nvdimm = nd_mapping->nvdimm;
619
Dan Williamsae8219f2016-09-19 16:04:21 -0700620 mutex_lock(&nd_mapping->lock);
621 nd_mapping_free_labels(nd_mapping);
622 mutex_unlock(&nd_mapping->lock);
623
Dan Williamsbf9bccc2015-06-17 17:14:46 -0400624 put_ndd(ndd);
625 nd_mapping->ndd = NULL;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400626 if (ndd)
627 atomic_dec(&nvdimm->busy);
Dan Williamseaf96152015-05-01 13:11:27 -0400628 }
Dan Williams8c2f7e82015-06-25 04:20:04 -0400629 }
Dan Williamsc9e582a2017-05-29 23:12:19 -0700630 if (dev->parent && is_nd_region(dev->parent) && probe) {
Dan Williams8c2f7e82015-06-25 04:20:04 -0400631 nd_region = to_nd_region(dev->parent);
Dan Williams1b40e092015-05-01 13:34:01 -0400632 nvdimm_bus_lock(dev);
633 if (nd_region->ns_seed == dev)
Dan Williams98a29c32016-09-30 15:28:27 -0700634 nd_region_create_ns_seed(nd_region);
Dan Williams1b40e092015-05-01 13:34:01 -0400635 nvdimm_bus_unlock(dev);
Dan Williamseaf96152015-05-01 13:11:27 -0400636 }
Dan Williams8c2f7e82015-06-25 04:20:04 -0400637 if (is_nd_btt(dev) && probe) {
Dan Williams8ca24352015-07-24 23:42:34 -0400638 struct nd_btt *nd_btt = to_nd_btt(dev);
639
Dan Williams8c2f7e82015-06-25 04:20:04 -0400640 nd_region = to_nd_region(dev->parent);
641 nvdimm_bus_lock(dev);
642 if (nd_region->btt_seed == dev)
643 nd_region_create_btt_seed(nd_region);
Dan Williams98a29c32016-09-30 15:28:27 -0700644 if (nd_region->ns_seed == &nd_btt->ndns->dev)
645 nd_region_create_ns_seed(nd_region);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400646 nvdimm_bus_unlock(dev);
647 }
Dan Williams2dc43332015-12-13 11:41:36 -0800648 if (is_nd_pfn(dev) && probe) {
Dan Williams98a29c32016-09-30 15:28:27 -0700649 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
650
Dan Williams2dc43332015-12-13 11:41:36 -0800651 nd_region = to_nd_region(dev->parent);
652 nvdimm_bus_lock(dev);
653 if (nd_region->pfn_seed == dev)
654 nd_region_create_pfn_seed(nd_region);
Dan Williams98a29c32016-09-30 15:28:27 -0700655 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
656 nd_region_create_ns_seed(nd_region);
Dan Williams2dc43332015-12-13 11:41:36 -0800657 nvdimm_bus_unlock(dev);
658 }
Dan Williamscd034122016-03-11 10:15:36 -0800659 if (is_nd_dax(dev) && probe) {
Dan Williams98a29c32016-09-30 15:28:27 -0700660 struct nd_dax *nd_dax = to_nd_dax(dev);
661
Dan Williamscd034122016-03-11 10:15:36 -0800662 nd_region = to_nd_region(dev->parent);
663 nvdimm_bus_lock(dev);
664 if (nd_region->dax_seed == dev)
665 nd_region_create_dax_seed(nd_region);
Dan Williams98a29c32016-09-30 15:28:27 -0700666 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
667 nd_region_create_ns_seed(nd_region);
Dan Williamscd034122016-03-11 10:15:36 -0800668 nvdimm_bus_unlock(dev);
669 }
Dan Williamseaf96152015-05-01 13:11:27 -0400670}
671
672void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
673{
674 nd_region_notify_driver_action(nvdimm_bus, dev, true);
675}
676
677void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
678{
679 nd_region_notify_driver_action(nvdimm_bus, dev, false);
680}
681
Dan Williams1f7df6f2015-06-09 20:13:14 -0400682static ssize_t mappingN(struct device *dev, char *buf, int n)
683{
684 struct nd_region *nd_region = to_nd_region(dev);
685 struct nd_mapping *nd_mapping;
686 struct nvdimm *nvdimm;
687
688 if (n >= nd_region->ndr_mappings)
689 return -ENXIO;
690 nd_mapping = &nd_region->mapping[n];
691 nvdimm = nd_mapping->nvdimm;
692
693 return sprintf(buf, "%s,%llu,%llu\n", dev_name(&nvdimm->dev),
694 nd_mapping->start, nd_mapping->size);
695}
696
697#define REGION_MAPPING(idx) \
698static ssize_t mapping##idx##_show(struct device *dev, \
699 struct device_attribute *attr, char *buf) \
700{ \
701 return mappingN(dev, buf, idx); \
702} \
703static DEVICE_ATTR_RO(mapping##idx)
704
705/*
706 * 32 should be enough for a while, even in the presence of socket
707 * interleave a 32-way interleave set is a degenerate case.
708 */
709REGION_MAPPING(0);
710REGION_MAPPING(1);
711REGION_MAPPING(2);
712REGION_MAPPING(3);
713REGION_MAPPING(4);
714REGION_MAPPING(5);
715REGION_MAPPING(6);
716REGION_MAPPING(7);
717REGION_MAPPING(8);
718REGION_MAPPING(9);
719REGION_MAPPING(10);
720REGION_MAPPING(11);
721REGION_MAPPING(12);
722REGION_MAPPING(13);
723REGION_MAPPING(14);
724REGION_MAPPING(15);
725REGION_MAPPING(16);
726REGION_MAPPING(17);
727REGION_MAPPING(18);
728REGION_MAPPING(19);
729REGION_MAPPING(20);
730REGION_MAPPING(21);
731REGION_MAPPING(22);
732REGION_MAPPING(23);
733REGION_MAPPING(24);
734REGION_MAPPING(25);
735REGION_MAPPING(26);
736REGION_MAPPING(27);
737REGION_MAPPING(28);
738REGION_MAPPING(29);
739REGION_MAPPING(30);
740REGION_MAPPING(31);
741
742static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
743{
744 struct device *dev = container_of(kobj, struct device, kobj);
745 struct nd_region *nd_region = to_nd_region(dev);
746
747 if (n < nd_region->ndr_mappings)
748 return a->mode;
749 return 0;
750}
751
752static struct attribute *mapping_attributes[] = {
753 &dev_attr_mapping0.attr,
754 &dev_attr_mapping1.attr,
755 &dev_attr_mapping2.attr,
756 &dev_attr_mapping3.attr,
757 &dev_attr_mapping4.attr,
758 &dev_attr_mapping5.attr,
759 &dev_attr_mapping6.attr,
760 &dev_attr_mapping7.attr,
761 &dev_attr_mapping8.attr,
762 &dev_attr_mapping9.attr,
763 &dev_attr_mapping10.attr,
764 &dev_attr_mapping11.attr,
765 &dev_attr_mapping12.attr,
766 &dev_attr_mapping13.attr,
767 &dev_attr_mapping14.attr,
768 &dev_attr_mapping15.attr,
769 &dev_attr_mapping16.attr,
770 &dev_attr_mapping17.attr,
771 &dev_attr_mapping18.attr,
772 &dev_attr_mapping19.attr,
773 &dev_attr_mapping20.attr,
774 &dev_attr_mapping21.attr,
775 &dev_attr_mapping22.attr,
776 &dev_attr_mapping23.attr,
777 &dev_attr_mapping24.attr,
778 &dev_attr_mapping25.attr,
779 &dev_attr_mapping26.attr,
780 &dev_attr_mapping27.attr,
781 &dev_attr_mapping28.attr,
782 &dev_attr_mapping29.attr,
783 &dev_attr_mapping30.attr,
784 &dev_attr_mapping31.attr,
785 NULL,
786};
787
788struct attribute_group nd_mapping_attribute_group = {
789 .is_visible = mapping_visible,
790 .attrs = mapping_attributes,
791};
792EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
793
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400794int nd_blk_region_init(struct nd_region *nd_region)
Dan Williams1f7df6f2015-06-09 20:13:14 -0400795{
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400796 struct device *dev = &nd_region->dev;
797 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
798
799 if (!is_nd_blk(dev))
800 return 0;
801
802 if (nd_region->ndr_mappings < 1) {
803 dev_err(dev, "invalid BLK region\n");
804 return -ENXIO;
805 }
806
807 return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400808}
Dan Williams1f7df6f2015-06-09 20:13:14 -0400809
Vishal Verma5212e112015-06-25 04:20:32 -0400810/**
811 * nd_region_acquire_lane - allocate and lock a lane
812 * @nd_region: region id and number of lanes possible
813 *
814 * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
815 * We optimize for the common case where there are 256 lanes, one
816 * per-cpu. For larger systems we need to lock to share lanes. For now
817 * this implementation assumes the cost of maintaining an allocator for
818 * free lanes is on the order of the lock hold time, so it implements a
819 * static lane = cpu % num_lanes mapping.
820 *
821 * In the case of a BTT instance on top of a BLK namespace a lane may be
822 * acquired recursively. We lock on the first instance.
823 *
824 * In the case of a BTT instance on top of PMEM, we only acquire a lane
825 * for the BTT metadata updates.
826 */
827unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
828{
829 unsigned int cpu, lane;
830
831 cpu = get_cpu();
832 if (nd_region->num_lanes < nr_cpu_ids) {
833 struct nd_percpu_lane *ndl_lock, *ndl_count;
834
835 lane = cpu % nd_region->num_lanes;
836 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
837 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
838 if (ndl_count->count++ == 0)
839 spin_lock(&ndl_lock->lock);
840 } else
841 lane = cpu;
842
843 return lane;
844}
845EXPORT_SYMBOL(nd_region_acquire_lane);
846
847void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
848{
849 if (nd_region->num_lanes < nr_cpu_ids) {
850 unsigned int cpu = get_cpu();
851 struct nd_percpu_lane *ndl_lock, *ndl_count;
852
853 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
854 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
855 if (--ndl_count->count == 0)
856 spin_unlock(&ndl_lock->lock);
857 put_cpu();
858 }
859 put_cpu();
860}
861EXPORT_SYMBOL(nd_region_release_lane);
862
Dan Williams1f7df6f2015-06-09 20:13:14 -0400863static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
864 struct nd_region_desc *ndr_desc, struct device_type *dev_type,
865 const char *caller)
866{
867 struct nd_region *nd_region;
868 struct device *dev;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400869 void *region_buf;
Vishal Verma5212e112015-06-25 04:20:32 -0400870 unsigned int i;
Dan Williams58138822015-06-23 20:08:34 -0400871 int ro = 0;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400872
873 for (i = 0; i < ndr_desc->num_mappings; i++) {
Dan Williams44c462e2016-09-19 16:38:50 -0700874 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
875 struct nvdimm *nvdimm = mapping->nvdimm;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400876
Dan Williams44c462e2016-09-19 16:38:50 -0700877 if ((mapping->start | mapping->size) % SZ_4K) {
Dan Williams1f7df6f2015-06-09 20:13:14 -0400878 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
879 caller, dev_name(&nvdimm->dev), i);
880
881 return NULL;
882 }
Dan Williams58138822015-06-23 20:08:34 -0400883
Dan Williams8f078b32017-05-04 14:01:24 -0700884 if (test_bit(NDD_UNARMED, &nvdimm->flags))
Dan Williams58138822015-06-23 20:08:34 -0400885 ro = 1;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400886 }
887
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400888 if (dev_type == &nd_blk_device_type) {
889 struct nd_blk_region_desc *ndbr_desc;
890 struct nd_blk_region *ndbr;
891
892 ndbr_desc = to_blk_region_desc(ndr_desc);
893 ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
894 * ndr_desc->num_mappings,
895 GFP_KERNEL);
896 if (ndbr) {
897 nd_region = &ndbr->nd_region;
898 ndbr->enable = ndbr_desc->enable;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400899 ndbr->do_io = ndbr_desc->do_io;
900 }
901 region_buf = ndbr;
902 } else {
903 nd_region = kzalloc(sizeof(struct nd_region)
904 + sizeof(struct nd_mapping)
905 * ndr_desc->num_mappings,
906 GFP_KERNEL);
907 region_buf = nd_region;
908 }
909
910 if (!region_buf)
Dan Williams1f7df6f2015-06-09 20:13:14 -0400911 return NULL;
912 nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
Vishal Verma5212e112015-06-25 04:20:32 -0400913 if (nd_region->id < 0)
914 goto err_id;
915
916 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
917 if (!nd_region->lane)
918 goto err_percpu;
919
920 for (i = 0; i < nr_cpu_ids; i++) {
921 struct nd_percpu_lane *ndl;
922
923 ndl = per_cpu_ptr(nd_region->lane, i);
924 spin_lock_init(&ndl->lock);
925 ndl->count = 0;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400926 }
927
Dan Williams1f7df6f2015-06-09 20:13:14 -0400928 for (i = 0; i < ndr_desc->num_mappings; i++) {
Dan Williams44c462e2016-09-19 16:38:50 -0700929 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
930 struct nvdimm *nvdimm = mapping->nvdimm;
931
932 nd_region->mapping[i].nvdimm = nvdimm;
933 nd_region->mapping[i].start = mapping->start;
934 nd_region->mapping[i].size = mapping->size;
Dan Williamsae8219f2016-09-19 16:04:21 -0700935 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
936 mutex_init(&nd_region->mapping[i].lock);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400937
938 get_device(&nvdimm->dev);
939 }
940 nd_region->ndr_mappings = ndr_desc->num_mappings;
941 nd_region->provider_data = ndr_desc->provider_data;
Dan Williamseaf96152015-05-01 13:11:27 -0400942 nd_region->nd_set = ndr_desc->nd_set;
Vishal Verma5212e112015-06-25 04:20:32 -0400943 nd_region->num_lanes = ndr_desc->num_lanes;
Dan Williams004f1af2015-08-24 19:20:23 -0400944 nd_region->flags = ndr_desc->flags;
Dan Williams58138822015-06-23 20:08:34 -0400945 nd_region->ro = ro;
Toshi Kani41d7a6d2015-06-19 12:18:33 -0600946 nd_region->numa_node = ndr_desc->numa_node;
Dan Williams1b40e092015-05-01 13:34:01 -0400947 ida_init(&nd_region->ns_ida);
Dan Williams8c2f7e82015-06-25 04:20:04 -0400948 ida_init(&nd_region->btt_ida);
Dan Williamse1455742015-07-30 17:57:47 -0400949 ida_init(&nd_region->pfn_ida);
Dan Williamscd034122016-03-11 10:15:36 -0800950 ida_init(&nd_region->dax_ida);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400951 dev = &nd_region->dev;
952 dev_set_name(dev, "region%d", nd_region->id);
953 dev->parent = &nvdimm_bus->dev;
954 dev->type = dev_type;
955 dev->groups = ndr_desc->attr_groups;
956 nd_region->ndr_size = resource_size(ndr_desc->res);
957 nd_region->ndr_start = ndr_desc->res->start;
958 nd_device_register(dev);
959
960 return nd_region;
Vishal Verma5212e112015-06-25 04:20:32 -0400961
962 err_percpu:
963 ida_simple_remove(&region_ida, nd_region->id);
964 err_id:
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400965 kfree(region_buf);
Vishal Verma5212e112015-06-25 04:20:32 -0400966 return NULL;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400967}
968
969struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
970 struct nd_region_desc *ndr_desc)
971{
Vishal Verma5212e112015-06-25 04:20:32 -0400972 ndr_desc->num_lanes = ND_MAX_LANES;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400973 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
974 __func__);
975}
976EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
977
978struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
979 struct nd_region_desc *ndr_desc)
980{
981 if (ndr_desc->num_mappings > 1)
982 return NULL;
Vishal Verma5212e112015-06-25 04:20:32 -0400983 ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
Dan Williams1f7df6f2015-06-09 20:13:14 -0400984 return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
985 __func__);
986}
987EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
988
989struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
990 struct nd_region_desc *ndr_desc)
991{
Vishal Verma5212e112015-06-25 04:20:32 -0400992 ndr_desc->num_lanes = ND_MAX_LANES;
Dan Williams1f7df6f2015-06-09 20:13:14 -0400993 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
994 __func__);
995}
996EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
Dan Williamsb354aba2016-05-17 20:24:16 -0700997
Dan Williamsf284a4f2016-07-07 19:44:50 -0700998/**
999 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1000 * @nd_region: blk or interleaved pmem region
1001 */
1002void nvdimm_flush(struct nd_region *nd_region)
1003{
1004 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
Dan Williams0c27af62016-05-27 09:23:01 -07001005 int i, idx;
1006
1007 /*
1008 * Try to encourage some diversity in flush hint addresses
1009 * across cpus assuming a limited number of flush hints.
1010 */
1011 idx = this_cpu_read(flush_idx);
1012 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
Dan Williamsf284a4f2016-07-07 19:44:50 -07001013
1014 /*
1015 * The first wmb() is needed to 'sfence' all previous writes
1016 * such that they are architecturally visible for the platform
1017 * buffer flush. Note that we've already arranged for pmem
Dan Williams0aed55a2017-05-29 12:22:50 -07001018 * writes to avoid the cache via memcpy_flushcache(). The final
1019 * wmb() ensures ordering for the NVDIMM flush write.
Dan Williamsf284a4f2016-07-07 19:44:50 -07001020 */
1021 wmb();
1022 for (i = 0; i < nd_region->ndr_mappings; i++)
Dan Williams595c7302016-09-23 17:53:52 -07001023 if (ndrd_get_flush_wpq(ndrd, i, 0))
1024 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
Dan Williamsf284a4f2016-07-07 19:44:50 -07001025 wmb();
1026}
1027EXPORT_SYMBOL_GPL(nvdimm_flush);
1028
1029/**
1030 * nvdimm_has_flush - determine write flushing requirements
1031 * @nd_region: blk or interleaved pmem region
1032 *
1033 * Returns 1 if writes require flushing
1034 * Returns 0 if writes do not require flushing
1035 * Returns -ENXIO if flushing capability can not be determined
1036 */
1037int nvdimm_has_flush(struct nd_region *nd_region)
1038{
Dan Williamsf284a4f2016-07-07 19:44:50 -07001039 int i;
1040
Dan Williamsc00b3962017-05-29 23:11:57 -07001041 /* no nvdimm or pmem api == flushing capability unknown */
1042 if (nd_region->ndr_mappings == 0
1043 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
Dan Williamsf284a4f2016-07-07 19:44:50 -07001044 return -ENXIO;
1045
Dan Williamsbc042fd2017-04-24 15:43:05 -07001046 for (i = 0; i < nd_region->ndr_mappings; i++) {
1047 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1048 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1049
1050 /* flush hints present / available */
1051 if (nvdimm->num_flush)
Dan Williamsf284a4f2016-07-07 19:44:50 -07001052 return 1;
Dan Williamsbc042fd2017-04-24 15:43:05 -07001053 }
Dan Williamsf284a4f2016-07-07 19:44:50 -07001054
1055 /*
1056 * The platform defines dimm devices without hints, assume
1057 * platform persistence mechanism like ADR
1058 */
1059 return 0;
1060}
1061EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1062
Dan Williams0b277962017-06-09 09:46:50 -07001063int nvdimm_has_cache(struct nd_region *nd_region)
1064{
1065 return is_nd_pmem(&nd_region->dev);
1066}
1067EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1068
Dan Williamsb354aba2016-05-17 20:24:16 -07001069void __exit nd_region_devs_exit(void)
1070{
1071 ida_destroy(&region_ida);
1072}