| Murali Karicheri | 0c4ffcf | 2014-09-02 17:26:19 -0600 | [diff] [blame^] | 1 | /* |
| 2 | * Keystone PCI Controller's common includes |
| 3 | * |
| 4 | * Copyright (C) 2013-2014 Texas Instruments., Ltd. |
| 5 | * http://www.ti.com |
| 6 | * |
| 7 | * Author: Murali Karicheri <m-karicheri2@ti.com> |
| 8 | * |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #define MAX_LEGACY_IRQS 4 |
| 16 | #define MAX_MSI_HOST_IRQS 8 |
| 17 | #define MAX_LEGACY_HOST_IRQS 4 |
| 18 | |
| 19 | struct keystone_pcie { |
| 20 | struct clk *clk; |
| 21 | struct pcie_port pp; |
| 22 | void __iomem *va_reg_pciid; |
| 23 | |
| 24 | int num_legacy_host_irqs; |
| 25 | int legacy_host_irqs[MAX_LEGACY_HOST_IRQS]; |
| 26 | struct device_node *legacy_intc_np; |
| 27 | |
| 28 | int num_msi_host_irqs; |
| 29 | int msi_host_irqs[MAX_MSI_HOST_IRQS]; |
| 30 | struct device_node *msi_intc_np; |
| 31 | struct irq_domain *legacy_irq_domain; |
| 32 | |
| 33 | /* Application register space */ |
| 34 | void __iomem *va_app_base; |
| 35 | struct resource app; |
| 36 | }; |
| 37 | |
| 38 | /* Keystone DW specific MSI controller APIs/definitions */ |
| 39 | void ks_dw_pcie_handle_msi_irq(struct keystone_pcie *ks_pcie, int offset); |
| 40 | u32 ks_dw_pcie_get_msi_data(struct pcie_port *pp); |
| 41 | |
| 42 | /* Keystone specific PCI controller APIs */ |
| 43 | void ks_dw_pcie_enable_legacy_irqs(struct keystone_pcie *ks_pcie); |
| 44 | void ks_dw_pcie_handle_legacy_irq(struct keystone_pcie *ks_pcie, int offset); |
| 45 | int ks_dw_pcie_host_init(struct keystone_pcie *ks_pcie, |
| 46 | struct device_node *msi_intc_np); |
| 47 | int ks_dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, |
| 48 | unsigned int devfn, int where, int size, u32 val); |
| 49 | int ks_dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, |
| 50 | unsigned int devfn, int where, int size, u32 *val); |
| 51 | void ks_dw_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie); |
| 52 | int ks_dw_pcie_link_up(struct pcie_port *pp); |
| 53 | void ks_dw_pcie_initiate_link_train(struct keystone_pcie *ks_pcie); |
| 54 | void ks_dw_pcie_msi_set_irq(struct pcie_port *pp, int irq); |
| 55 | void ks_dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq); |
| 56 | void ks_dw_pcie_v3_65_scan_bus(struct pcie_port *pp); |
| 57 | int ks_dw_pcie_msi_host_init(struct pcie_port *pp, |
| 58 | struct msi_chip *chip); |