Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* arch/arm/mach-lh7a40x/irq-kev7a400.c |
| 2 | * |
| 3 | * Copyright (C) 2004 Coastal Environmental Systems |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License |
| 7 | * version 2 as published by the Free Software Foundation. |
| 8 | * |
| 9 | */ |
| 10 | |
| 11 | #include <linux/interrupt.h> |
| 12 | #include <linux/init.h> |
| 13 | |
| 14 | #include <asm/irq.h> |
| 15 | #include <asm/mach/irq.h> |
| 16 | #include <asm/mach/hardware.h> |
| 17 | #include <asm/mach/irqs.h> |
| 18 | |
Russell King | 411ef7f | 2006-03-04 10:37:07 +0000 | [diff] [blame] | 19 | #include "common.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | |
| 21 | /* KEV7a400 CPLD IRQ handling */ |
| 22 | |
| 23 | static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */ |
| 24 | |
| 25 | static void |
| 26 | lh7a400_ack_cpld_irq (u32 irq) |
| 27 | { |
| 28 | CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD); |
| 29 | } |
| 30 | |
| 31 | static void |
| 32 | lh7a400_mask_cpld_irq (u32 irq) |
| 33 | { |
| 34 | CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD)); |
| 35 | CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; |
| 36 | } |
| 37 | |
| 38 | static void |
| 39 | lh7a400_unmask_cpld_irq (u32 irq) |
| 40 | { |
| 41 | CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD); |
| 42 | CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; |
| 43 | } |
| 44 | |
| 45 | static struct |
David Brownell | 38c677c | 2006-08-01 22:26:25 +0100 | [diff] [blame] | 46 | irq_chip lh7a400_cpld_chip = { |
| 47 | .name = "CPLD", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | .ack = lh7a400_ack_cpld_irq, |
| 49 | .mask = lh7a400_mask_cpld_irq, |
| 50 | .unmask = lh7a400_unmask_cpld_irq, |
| 51 | }; |
| 52 | |
| 53 | static void |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame^] | 54 | lh7a400_cpld_handler (unsigned int irq, struct irqdesc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | { |
| 56 | u32 mask = CPLD_LATCHED_INTS; |
| 57 | irq = IRQ_KEV_7A400_CPLD; |
| 58 | for (; mask; mask >>= 1, ++irq) { |
| 59 | if (mask & 1) |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame^] | 60 | desc[irq].handle (irq, desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | } |
| 62 | } |
| 63 | |
| 64 | /* IRQ initialization */ |
| 65 | |
| 66 | void __init |
| 67 | lh7a400_init_board_irq (void) |
| 68 | { |
| 69 | int irq; |
| 70 | |
| 71 | for (irq = IRQ_KEV7A400_CPLD; |
| 72 | irq < IRQ_KEV7A400_CPLD + NR_IRQ_KEV7A400_CPLD; ++irq) { |
| 73 | set_irq_chip (irq, &lh7a400_cpld_chip); |
| 74 | set_irq_handler (irq, do_edge_IRQ); |
| 75 | set_irq_flags (irq, IRQF_VALID); |
| 76 | } |
| 77 | set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler); |
| 78 | |
| 79 | /* Clear all CPLD interrupts */ |
| 80 | CPLD_CL_INT = 0xff; /* CPLD_INTR_MMC_CD | CPLD_INTR_ETH_INT; */ |
| 81 | |
| 82 | /* *** FIXME CF enabled in ide-probe.c */ |
| 83 | |
| 84 | GPIO_GPIOINTEN = 0; /* Disable all GPIO interrupts */ |
| 85 | barrier(); |
| 86 | GPIO_INTTYPE1 |
| 87 | = (GPIO_INTR_PCC1_CD | GPIO_INTR_PCC1_CD); /* Edge trig. */ |
| 88 | GPIO_INTTYPE2 = 0; /* Falling edge & low-level */ |
| 89 | GPIO_GPIOFEOI = 0xff; /* Clear all GPIO interrupts */ |
| 90 | GPIO_GPIOINTEN = 0xff; /* Enable all GPIO interrupts */ |
| 91 | |
| 92 | init_FIQ(); |
| 93 | } |