Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 1 | #ifndef __LINUX_GPIO_DRIVER_H |
| 2 | #define __LINUX_GPIO_DRIVER_H |
| 3 | |
| 4 | #include <linux/types.h> |
Alexandre Courbot | c9a9972 | 2013-11-25 18:34:24 +0900 | [diff] [blame] | 5 | #include <linux/module.h> |
Linus Walleij | 1425052 | 2014-03-25 10:40:18 +0100 | [diff] [blame] | 6 | #include <linux/irq.h> |
| 7 | #include <linux/irqchip/chained_irq.h> |
| 8 | #include <linux/irqdomain.h> |
Linus Walleij | 964cb34 | 2015-03-18 01:56:17 +0100 | [diff] [blame] | 9 | #include <linux/pinctrl/pinctrl.h> |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 10 | |
| 11 | struct device; |
| 12 | struct gpio_desc; |
Alexandre Courbot | c9a9972 | 2013-11-25 18:34:24 +0900 | [diff] [blame] | 13 | struct of_phandle_args; |
| 14 | struct device_node; |
Stephen Rothwell | f3ed0b6 | 2013-10-29 01:06:23 +1100 | [diff] [blame] | 15 | struct seq_file; |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 16 | |
Alexandre Courbot | bb1e88c | 2014-02-09 17:43:54 +0900 | [diff] [blame] | 17 | #ifdef CONFIG_GPIOLIB |
| 18 | |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 19 | /** |
| 20 | * struct gpio_chip - abstract a GPIO controller |
| 21 | * @label: for diagnostics |
| 22 | * @dev: optional device providing the GPIOs |
Johan Hovold | 6a4b6b0 | 2015-05-04 17:10:31 +0200 | [diff] [blame] | 23 | * @cdev: class device used by sysfs interface (may be NULL) |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 24 | * @owner: helps prevent removal of modules exporting active GPIOs |
| 25 | * @list: links gpio_chips together for traversal |
| 26 | * @request: optional hook for chip-specific activation, such as |
| 27 | * enabling module power and clock; may sleep |
| 28 | * @free: optional hook for chip-specific deactivation, such as |
| 29 | * disabling module power and clock; may sleep |
| 30 | * @get_direction: returns direction for signal "offset", 0=out, 1=in, |
| 31 | * (same as GPIOF_DIR_XXX), or negative error |
| 32 | * @direction_input: configures signal "offset" as input, or returns error |
| 33 | * @direction_output: configures signal "offset" as output, or returns error |
| 34 | * @get: returns value for signal "offset"; for output signals this |
| 35 | * returns either the value actually sensed, or zero |
| 36 | * @set: assigns output value for signal "offset" |
Rojhalat Ibrahim | 5f42424 | 2014-11-04 17:12:06 +0100 | [diff] [blame] | 37 | * @set_multiple: assigns output values for multiple signals defined by "mask" |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 38 | * @set_debounce: optional hook for setting debounce time for specified gpio in |
| 39 | * interrupt triggered gpio chips |
| 40 | * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; |
| 41 | * implementation may not sleep |
| 42 | * @dbg_show: optional routine to show contents in debugfs; default code |
| 43 | * will be used when this is omitted, but custom code can show extra |
| 44 | * state (such as pullup/pulldown configuration). |
Linus Walleij | af6c235 | 2015-05-13 13:03:21 +0200 | [diff] [blame] | 45 | * @base: identifies the first GPIO number handled by this chip; |
| 46 | * or, if negative during registration, requests dynamic ID allocation. |
| 47 | * DEPRECATION: providing anything non-negative and nailing the base |
| 48 | * base offset of GPIO chips is deprecated. Please pass -1 as base to |
| 49 | * let gpiolib select the chip base in all possible cases. We want to |
| 50 | * get rid of the static GPIO number space in the long run. |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 51 | * @ngpio: the number of GPIOs handled by this controller; the last GPIO |
| 52 | * handled is (base + ngpio - 1). |
| 53 | * @desc: array of ngpio descriptors. Private. |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 54 | * @names: if set, must be an array of strings to use as alternative |
| 55 | * names for the GPIOs in this chip. Any entry in the array |
| 56 | * may be NULL if there is no alias for the GPIO, however the |
| 57 | * array must be @ngpio entries long. A name can include a single printk |
| 58 | * format specifier for an unsigned int. It is substituted by the actual |
| 59 | * number of the gpio. |
Linus Walleij | 9fb1f39 | 2013-12-04 14:42:46 +0100 | [diff] [blame] | 60 | * @can_sleep: flag must be set iff get()/set() methods sleep, as they |
Linus Walleij | 1c8732b | 2014-04-09 13:34:39 +0200 | [diff] [blame] | 61 | * must while accessing GPIO expander chips over I2C or SPI. This |
| 62 | * implies that if the chip supports IRQs, these IRQs need to be threaded |
| 63 | * as the chip access may sleep when e.g. reading out the IRQ status |
| 64 | * registers. |
Octavian Purdila | 295494a | 2014-09-19 23:22:44 +0300 | [diff] [blame] | 65 | * @irq_not_threaded: flag must be set if @can_sleep is set but the |
| 66 | * IRQs don't need to be threaded |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 67 | * |
| 68 | * A gpio_chip can help platforms abstract various sources of GPIOs so |
| 69 | * they can all be accessed through a common programing interface. |
| 70 | * Example sources would be SOC controllers, FPGAs, multifunction |
| 71 | * chips, dedicated GPIO expanders, and so on. |
| 72 | * |
| 73 | * Each chip controls a number of signals, identified in method calls |
| 74 | * by "offset" values in the range 0..(@ngpio - 1). When those signals |
| 75 | * are referenced through calls like gpio_get_value(gpio), the offset |
| 76 | * is calculated by subtracting @base from the gpio number. |
| 77 | */ |
| 78 | struct gpio_chip { |
| 79 | const char *label; |
| 80 | struct device *dev; |
Johan Hovold | 6a4b6b0 | 2015-05-04 17:10:31 +0200 | [diff] [blame] | 81 | struct device *cdev; |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 82 | struct module *owner; |
| 83 | struct list_head list; |
| 84 | |
| 85 | int (*request)(struct gpio_chip *chip, |
| 86 | unsigned offset); |
| 87 | void (*free)(struct gpio_chip *chip, |
| 88 | unsigned offset); |
| 89 | int (*get_direction)(struct gpio_chip *chip, |
| 90 | unsigned offset); |
| 91 | int (*direction_input)(struct gpio_chip *chip, |
| 92 | unsigned offset); |
| 93 | int (*direction_output)(struct gpio_chip *chip, |
| 94 | unsigned offset, int value); |
| 95 | int (*get)(struct gpio_chip *chip, |
| 96 | unsigned offset); |
| 97 | void (*set)(struct gpio_chip *chip, |
| 98 | unsigned offset, int value); |
Rojhalat Ibrahim | 5f42424 | 2014-11-04 17:12:06 +0100 | [diff] [blame] | 99 | void (*set_multiple)(struct gpio_chip *chip, |
| 100 | unsigned long *mask, |
| 101 | unsigned long *bits); |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 102 | int (*set_debounce)(struct gpio_chip *chip, |
| 103 | unsigned offset, |
| 104 | unsigned debounce); |
| 105 | |
| 106 | int (*to_irq)(struct gpio_chip *chip, |
| 107 | unsigned offset); |
| 108 | |
| 109 | void (*dbg_show)(struct seq_file *s, |
| 110 | struct gpio_chip *chip); |
| 111 | int base; |
| 112 | u16 ngpio; |
| 113 | struct gpio_desc *desc; |
| 114 | const char *const *names; |
Linus Walleij | 9fb1f39 | 2013-12-04 14:42:46 +0100 | [diff] [blame] | 115 | bool can_sleep; |
Octavian Purdila | 295494a | 2014-09-19 23:22:44 +0300 | [diff] [blame] | 116 | bool irq_not_threaded; |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 117 | |
Linus Walleij | 1425052 | 2014-03-25 10:40:18 +0100 | [diff] [blame] | 118 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
| 119 | /* |
Paul Bolle | 7d75a87 | 2014-09-05 13:09:25 +0200 | [diff] [blame] | 120 | * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib |
Linus Walleij | 1425052 | 2014-03-25 10:40:18 +0100 | [diff] [blame] | 121 | * to handle IRQs for most practical cases. |
| 122 | */ |
| 123 | struct irq_chip *irqchip; |
| 124 | struct irq_domain *irqdomain; |
Linus Walleij | c3626fd | 2014-03-28 20:42:01 +0100 | [diff] [blame] | 125 | unsigned int irq_base; |
Linus Walleij | 1425052 | 2014-03-25 10:40:18 +0100 | [diff] [blame] | 126 | irq_flow_handler_t irq_handler; |
| 127 | unsigned int irq_default_type; |
Dmitry Eremin-Solenikov | 25e4fe9 | 2015-05-12 20:12:23 +0300 | [diff] [blame] | 128 | int irq_parent; |
Linus Walleij | 1425052 | 2014-03-25 10:40:18 +0100 | [diff] [blame] | 129 | #endif |
| 130 | |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 131 | #if defined(CONFIG_OF_GPIO) |
| 132 | /* |
| 133 | * If CONFIG_OF is enabled, then all GPIO controllers described in the |
| 134 | * device tree automatically may have an OF translation |
| 135 | */ |
| 136 | struct device_node *of_node; |
| 137 | int of_gpio_n_cells; |
| 138 | int (*of_xlate)(struct gpio_chip *gc, |
| 139 | const struct of_phandle_args *gpiospec, u32 *flags); |
| 140 | #endif |
| 141 | #ifdef CONFIG_PINCTRL |
| 142 | /* |
| 143 | * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally |
| 144 | * describe the actual pin range which they serve in an SoC. This |
| 145 | * information would be used by pinctrl subsystem to configure |
| 146 | * corresponding pins for gpio usage. |
| 147 | */ |
| 148 | struct list_head pin_ranges; |
| 149 | #endif |
| 150 | }; |
| 151 | |
| 152 | extern const char *gpiochip_is_requested(struct gpio_chip *chip, |
| 153 | unsigned offset); |
| 154 | |
| 155 | /* add/remove chips */ |
| 156 | extern int gpiochip_add(struct gpio_chip *chip); |
abdoulaye berthe | e1db170 | 2014-07-05 18:28:50 +0200 | [diff] [blame] | 157 | extern void gpiochip_remove(struct gpio_chip *chip); |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 158 | extern struct gpio_chip *gpiochip_find(void *data, |
| 159 | int (*match)(struct gpio_chip *chip, void *data)); |
| 160 | |
| 161 | /* lock/unlock as IRQ */ |
Alexandre Courbot | e3a2e87 | 2014-10-23 17:27:07 +0900 | [diff] [blame] | 162 | int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); |
| 163 | void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 164 | |
Alexandre Courbot | bb1e88c | 2014-02-09 17:43:54 +0900 | [diff] [blame] | 165 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); |
| 166 | |
Linus Walleij | 1425052 | 2014-03-25 10:40:18 +0100 | [diff] [blame] | 167 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
| 168 | |
| 169 | void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, |
| 170 | struct irq_chip *irqchip, |
| 171 | int parent_irq, |
| 172 | irq_flow_handler_t parent_handler); |
| 173 | |
| 174 | int gpiochip_irqchip_add(struct gpio_chip *gpiochip, |
| 175 | struct irq_chip *irqchip, |
| 176 | unsigned int first_irq, |
| 177 | irq_flow_handler_t handler, |
| 178 | unsigned int type); |
| 179 | |
Paul Bolle | 7d75a87 | 2014-09-05 13:09:25 +0200 | [diff] [blame] | 180 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ |
Linus Walleij | 1425052 | 2014-03-25 10:40:18 +0100 | [diff] [blame] | 181 | |
Linus Walleij | 964cb34 | 2015-03-18 01:56:17 +0100 | [diff] [blame] | 182 | #ifdef CONFIG_PINCTRL |
| 183 | |
| 184 | /** |
| 185 | * struct gpio_pin_range - pin range controlled by a gpio chip |
| 186 | * @head: list for maintaining set of pin ranges, used internally |
| 187 | * @pctldev: pinctrl device which handles corresponding pins |
| 188 | * @range: actual range of pins controlled by a gpio controller |
| 189 | */ |
| 190 | |
| 191 | struct gpio_pin_range { |
| 192 | struct list_head node; |
| 193 | struct pinctrl_dev *pctldev; |
| 194 | struct pinctrl_gpio_range range; |
| 195 | }; |
| 196 | |
| 197 | int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, |
| 198 | unsigned int gpio_offset, unsigned int pin_offset, |
| 199 | unsigned int npins); |
| 200 | int gpiochip_add_pingroup_range(struct gpio_chip *chip, |
| 201 | struct pinctrl_dev *pctldev, |
| 202 | unsigned int gpio_offset, const char *pin_group); |
| 203 | void gpiochip_remove_pin_ranges(struct gpio_chip *chip); |
| 204 | |
| 205 | #else |
| 206 | |
| 207 | static inline int |
| 208 | gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, |
| 209 | unsigned int gpio_offset, unsigned int pin_offset, |
| 210 | unsigned int npins) |
| 211 | { |
| 212 | return 0; |
| 213 | } |
| 214 | static inline int |
| 215 | gpiochip_add_pingroup_range(struct gpio_chip *chip, |
| 216 | struct pinctrl_dev *pctldev, |
| 217 | unsigned int gpio_offset, const char *pin_group) |
| 218 | { |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | static inline void |
| 223 | gpiochip_remove_pin_ranges(struct gpio_chip *chip) |
| 224 | { |
| 225 | } |
| 226 | |
| 227 | #endif /* CONFIG_PINCTRL */ |
| 228 | |
Alexandre Courbot | abdc08a | 2014-08-19 10:06:09 -0700 | [diff] [blame] | 229 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, |
| 230 | const char *label); |
Guenter Roeck | f7d4ad9 | 2014-07-22 08:01:01 -0700 | [diff] [blame] | 231 | void gpiochip_free_own_desc(struct gpio_desc *desc); |
| 232 | |
Alexandre Courbot | bb1e88c | 2014-02-09 17:43:54 +0900 | [diff] [blame] | 233 | #else /* CONFIG_GPIOLIB */ |
| 234 | |
| 235 | static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) |
| 236 | { |
| 237 | /* GPIO can never have been requested */ |
| 238 | WARN_ON(1); |
| 239 | return ERR_PTR(-ENODEV); |
| 240 | } |
| 241 | |
| 242 | #endif /* CONFIG_GPIOLIB */ |
| 243 | |
Alexandre Courbot | 79a9bec | 2013-10-17 10:21:36 -0700 | [diff] [blame] | 244 | #endif |